{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,25]],"date-time":"2026-03-25T08:43:45Z","timestamp":1774428225471,"version":"3.50.1"},"reference-count":12,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2020,5,1]],"date-time":"2020-05-01T00:00:00Z","timestamp":1588291200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,5,1]],"date-time":"2020-05-01T00:00:00Z","timestamp":1588291200000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,5,1]],"date-time":"2020-05-01T00:00:00Z","timestamp":1588291200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,5,1]],"date-time":"2020-05-01T00:00:00Z","timestamp":1588291200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100002418","name":"Intel Corporation","doi-asserted-by":"publisher","award":["Intel Strategic Research Alliance (ISRA)"],"award-info":[{"award-number":["Intel Strategic Research Alliance (ISRA)"]}],"id":[{"id":"10.13039\/100002418","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CCF-1725734"],"award-info":[{"award-number":["CCF-1725734"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["CNS-1816226"],"award-info":[{"award-number":["CNS-1816226"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Micro"],"published-print":{"date-parts":[[2020,5,1]]},"DOI":"10.1109\/mm.2020.2986204","type":"journal-article","created":{"date-parts":[[2020,4,16]],"date-time":"2020-04-16T20:49:30Z","timestamp":1587070170000},"page":"91-98","source":"Crossref","is-referenced-by-count":13,"title":["MicroScope: Enabling Microarchitectural Replay Attacks"],"prefix":"10.1109","volume":"40","author":[{"given":"Dimitrios","family":"Skarlatos","sequence":"first","affiliation":[{"name":"University of Illinois at Urbana–Champaign"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mengjia","family":"Yan","sequence":"additional","affiliation":[{"name":"Massachusetts Institute of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bhargava","family":"Gopireddy","sequence":"additional","affiliation":[{"name":"Nvidia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Read","family":"Sprabery","sequence":"additional","affiliation":[{"name":"Google"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Josep","family":"Torrellas","sequence":"additional","affiliation":[{"name":"University of Illinois at Urbana–Champaign"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Christopher W.","family":"Fletcher","sequence":"additional","affiliation":[{"name":"University of Illinois at Urbana–Champaign"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/3173162.3173204"},{"key":"ref3","article-title":"Flush+Reload: A high resolution, low noise, L3 cache side-channel attack","author":"yarom","year":"0","journal-title":"Proc Usenix Secur Symp"},{"key":"ref10","article-title":"Open source cryptography and SSL\/TLS toolkit","year":"2019"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2019.00066"},{"key":"ref11","first-page":"249","article-title":"A systematic evaluation of transient execution attacks and defenses","author":"canella","year":"0","journal-title":"Proc 28th USENIX Security Symp"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2019.00004"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080223"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/3133956.3134098"},{"key":"ref7","article-title":"Intel software guard extensions programming reference","year":"2013"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-53140-2_17"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00083"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2015.43"}],"container-title":["IEEE Micro"],"original-title":[],"link":[{"URL":"https:\/\/ieeexplore.ieee.org\/ielam\/40\/9099648\/9069250-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/40\/9099648\/09069250.pdf?arnumber=9069250","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,4]],"date-time":"2022-05-04T19:48:48Z","timestamp":1651693728000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9069250\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,5,1]]},"references-count":12,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/mm.2020.2986204","relation":{},"ISSN":["0272-1732","1937-4143"],"issn-type":[{"value":"0272-1732","type":"print"},{"value":"1937-4143","type":"electronic"}],"subject":[],"published":{"date-parts":[[2020,5,1]]}}}