{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,29]],"date-time":"2026-05-29T16:36:39Z","timestamp":1780072599525,"version":"3.54.0"},"reference-count":11,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2021,11,1]],"date-time":"2021-11-01T00:00:00Z","timestamp":1635724800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,11,1]],"date-time":"2021-11-01T00:00:00Z","timestamp":1635724800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,11,1]],"date-time":"2021-11-01T00:00:00Z","timestamp":1635724800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Micro"],"published-print":{"date-parts":[[2021,11,1]]},"DOI":"10.1109\/mm.2021.3113739","type":"journal-article","created":{"date-parts":[[2021,11,22]],"date-time":"2021-11-22T20:57:21Z","timestamp":1637614641000},"page":"121-128","source":"Crossref","is-referenced-by-count":2,"title":["How VLIWs Were Adopted as Digital Signal Processors"],"prefix":"10.1109","volume":"41","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-3270-4021","authenticated-orcid":false,"given":"Ray","family":"Simar","sequence":"first","affiliation":[{"name":"Rice University, Houston, TX, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Reid","family":"Tatge","sequence":"additional","affiliation":[{"name":"Google, Los Altos, CA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref4","article-title":"The C6x architecture of theTMS32OC6x","author":"dillon","year":"1997","journal-title":"Proc Int Conf Signal Process Appl Technol"},{"key":"ref3","author":"ellis","year":"1986","journal-title":"Bulldog A Compiler for VLIW Architectures"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1014192.802449"},{"key":"ref6","article-title":"Digital Signal Processors | NXP Semiconductors","year":"0"},{"key":"ref11","article-title":"Approaching peak performance with compiled code on a VLIW DSP","author":"davis","year":"1997","journal-title":"Proc Int Conf Signal Process Appl Technol"},{"key":"ref5","article-title":"Digital signal processors (DSPs) | Overview | Processors | TI","year":"0"},{"key":"ref8","volume":"253","author":"fisher","year":"1983","journal-title":"Very Long Instruction Word Architectures"},{"key":"ref7","article-title":"Processors and DSP | Analog Devices","year":"0"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2009.933431"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2009.932433"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/989393.989420"}],"container-title":["IEEE Micro"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/40\/9623381\/09623426.pdf?arnumber=9623426","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T14:50:53Z","timestamp":1652194253000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9623426\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,11,1]]},"references-count":11,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/mm.2021.3113739","relation":{},"ISSN":["0272-1732","1937-4143"],"issn-type":[{"value":"0272-1732","type":"print"},{"value":"1937-4143","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,11,1]]}}}