{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,15]],"date-time":"2026-05-15T13:31:39Z","timestamp":1778851899936,"version":"3.51.4"},"reference-count":6,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2023,5,1]],"date-time":"2023-05-01T00:00:00Z","timestamp":1682899200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2023,5,1]],"date-time":"2023-05-01T00:00:00Z","timestamp":1682899200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,5,1]],"date-time":"2023-05-01T00:00:00Z","timestamp":1682899200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Micro"],"published-print":{"date-parts":[[2023,5]]},"DOI":"10.1109\/mm.2023.3260186","type":"journal-article","created":{"date-parts":[[2023,3,22]],"date-time":"2023-03-22T17:55:54Z","timestamp":1679507754000},"page":"40-49","source":"Crossref","is-referenced-by-count":10,"title":["The AMD 400-G Adaptive SmartNIC System on Chip: A Technology Preview"],"prefix":"10.1109","volume":"43","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4851-3350","authenticated-orcid":false,"given":"Jaideep","family":"Dastidar","sequence":"first","affiliation":[{"name":"Adaptive and Embedded Computing Group, AMD, San Jose, CA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0009-0005-7906-4115","authenticated-orcid":false,"given":"David","family":"Riddoch","sequence":"additional","affiliation":[{"name":"Network Architecture Team,, AMD, Cambridge, U.K."}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-1629-4038","authenticated-orcid":false,"given":"Jason","family":"Moore","sequence":"additional","affiliation":[{"name":"Adaptive and Embedded Computing Group,, AMD, San Jose, CA, USA"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-0114-8713","authenticated-orcid":false,"given":"Steven","family":"Pope","sequence":"additional","affiliation":[{"name":"Network Architecture Team,, AMD, Cambridge, U.K."}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-9171-4744","authenticated-orcid":false,"given":"Jim","family":"Wesselkamper","sequence":"additional","affiliation":[{"name":"Adaptive and Embedded Computing Group,, AMD, San Jose, CA, USA"}]}],"member":"263","reference":[{"key":"ref4","year":"0","journal-title":"PCI Special Interest Group"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ANCS.2011.12"},{"key":"ref6","year":"2019","journal-title":"Security requirements for cryptographic modules"},{"key":"ref5","year":"2020","journal-title":"Attestation of system components v1 0 Requirements and recommendations"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/3373376.3378450"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750392"}],"container-title":["IEEE Micro"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/40\/10123124\/10078398.pdf?arnumber=10078398","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,5,29]],"date-time":"2023-05-29T17:34:41Z","timestamp":1685381681000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10078398\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,5]]},"references-count":6,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/mm.2023.3260186","relation":{},"ISSN":["0272-1732","1937-4143"],"issn-type":[{"value":"0272-1732","type":"print"},{"value":"1937-4143","type":"electronic"}],"subject":[],"published":{"date-parts":[[2023,5]]}}}