{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T22:10:43Z","timestamp":1781907043091,"version":"3.54.5"},"reference-count":14,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,6,8]],"date-time":"2022-06-08T00:00:00Z","timestamp":1654646400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,6,8]],"date-time":"2022-06-08T00:00:00Z","timestamp":1654646400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,6,8]]},"DOI":"10.1109\/mocast54814.2022.9837637","type":"proceedings-article","created":{"date-parts":[[2022,7,28]],"date-time":"2022-07-28T15:47:12Z","timestamp":1659023232000},"page":"1-4","source":"Crossref","is-referenced-by-count":7,"title":["Realization of Memristor-aided Logic Gates with Analog Memristive Devices"],"prefix":"10.1109","author":[{"given":"Hao","family":"Cai","sequence":"first","affiliation":[{"name":"Friedrich Schiller University Jena,Institute for Solid State Physics,Jena,Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ziang","family":"Chen","sequence":"additional","affiliation":[{"name":"Friedrich Schiller University Jena,Institute for Solid State Physics,Jena,Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Xianyue","family":"Zhao","sequence":"additional","affiliation":[{"name":"Friedrich Schiller University Jena,Institute for Solid State Physics,Jena,Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Christopher","family":"Bengel","sequence":"additional","affiliation":[{"name":"Engineering and Information Technology RWTH Aachen University,Institute of Materials in Electrical,Aachen,Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Feng","family":"Liu","sequence":"additional","affiliation":[{"name":"Forschungszentrum Juelich GmbH,Peter Gr&#x00FC;nberg Institut (PGI-7),Juelich,Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Heidemarie","family":"Schmidt","sequence":"additional","affiliation":[{"name":"Leibniz Institute of Photonic Technology,Institute for Solid State Physics Friedrich Schiller University Jena,Department of Quantum Detection,Jena,Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Stephan","family":"Menzel","sequence":"additional","affiliation":[{"name":"Forschungszentrum Juelich GmbH,Peter Gr&#x00FC;nberg Institut (PGI-7),Juelich,Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Nan","family":"Du","sequence":"additional","affiliation":[{"name":"Leibniz Institute of Photonic Technology,Institute for Solid State Physics Friedrich Schiller University Jena,Department of Quantum Detection,Jena,Germany"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1021\/am504871g"},{"key":"ref11","article-title":"Integrated non-volatile memory elements, design and use","author":"schmidt","year":"0","journal-title":"US Patent"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1002\/adfm.201303365"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2021.660894"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2013.6572343"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2018.8388838"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1038\/s41928-018-0092-2"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICTA53157.2021.9661770"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1016\/j.nanoms.2021.01.001"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"895","DOI":"10.1109\/TCSII.2014.2357292","article-title":"MAGIC&#x2014;Memristor-Aided Logic","volume":"61","author":"kvatinsky","year":"2014","journal-title":"IEEE Transactions on Circuits and Systems II Express Briefs"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"873","DOI":"10.1038\/nature08940","article-title":"&#x2018;Memristive' switches enable &#x2018;stateful' logic operations via material implication","volume":"464","author":"borghetti","year":"2010","journal-title":"Nature"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2019.2922889"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1038\/s41565-020-0655-z"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2020.3001247"}],"event":{"name":"2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST)","location":"Bremen, Germany","start":{"date-parts":[[2022,6,8]]},"end":{"date-parts":[[2022,6,10]]}},"container-title":["2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9837335\/9837476\/09837637.pdf?arnumber=9837637","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,8,22]],"date-time":"2022-08-22T16:06:09Z","timestamp":1661184369000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9837637\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,6,8]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/mocast54814.2022.9837637","relation":{},"subject":[],"published":{"date-parts":[[2022,6,8]]}}}