{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T22:17:18Z","timestamp":1729635438682,"version":"3.28.0"},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,7]]},"DOI":"10.1109\/mse.2009.5270816","type":"proceedings-article","created":{"date-parts":[[2009,9,30]],"date-time":"2009-09-30T18:35:31Z","timestamp":1254335731000},"page":"115-117","source":"Crossref","is-referenced-by-count":0,"title":["CNT logic knowledge module integrated in digital CMOS logic design course"],"prefix":"10.1109","author":[{"given":"Anita","family":"Kumari","sequence":"first","affiliation":[]},{"given":"Sanjukta","family":"Bhanja","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","volume":"1","author":"bloom","year":"1956","journal-title":"Taxonomy of educational objectives handbook I The cognitive domain"},{"year":"0","key":"17"},{"year":"0","key":"18"},{"journal-title":"Device Modeling and Circuit Performance Evaluation for Nanoscale Devices Silicon Technology Beyond 45nm node and Carbon Nanotube Field Effect Transistors","year":"2007","author":"deng","key":"15"},{"year":"0","key":"16"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/NORCHP.2005.1597030"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/MSE.2005.56"},{"year":"0","key":"11"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/TEVC.2003.810751"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1103\/RevModPhys.64.849"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1063\/1.356375"},{"year":"2002","key":"1","article-title":"international technology roadmap for semiconductor"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/NANOEL.2006.1609719"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/FIE.2005.1612260"},{"key":"6","first-page":"153","article-title":"complete logic family using tunnelingphase-logic devices","author":"fahmy","year":"2000","journal-title":"Microelectronics 1999 ICM '99 The Eleventh International Conference on"},{"key":"5","first-page":"717","article-title":"modeling and analysis of circuit performance of ballistic cnfet","author":"paul","year":"2006","journal-title":"DAC '06 Proceedings of the 43rd annual conference on Design automation"},{"key":"4","doi-asserted-by":"crossref","first-page":"1317","DOI":"10.1126\/science.1065824","article-title":"logic circuits with carbon nanotube transistors","author":"bachtold","year":"2001","journal-title":"SCIENCE -NEW YORK THEN WASHINGTON"},{"year":"0","key":"9"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TE.2003.817623"}],"event":{"name":"2009 IEEE International Conference on Microelectronic Systems Education (MSE)","start":{"date-parts":[[2009,7,25]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2009,7,27]]}},"container-title":["2009 IEEE International Conference on Microelectronic Systems Education"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5234370\/5270809\/05270816.pdf?arnumber=5270816","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T00:17:05Z","timestamp":1497831425000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5270816\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,7]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/mse.2009.5270816","relation":{},"subject":[],"published":{"date-parts":[[2009,7]]}}}