{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,24]],"date-time":"2026-03-24T15:50:28Z","timestamp":1774367428546,"version":"3.50.1"},"reference-count":19,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/mtdt.2002.1029769","type":"proceedings-article","created":{"date-parts":[[2003,6,25]],"date-time":"2003-06-25T18:14:31Z","timestamp":1056564871000},"page":"95-100","source":"Crossref","is-referenced-by-count":97,"title":["March SS: a test for all static simple RAM faults"],"prefix":"10.1109","author":[{"given":"S.","family":"Hamdioui","sequence":"first","affiliation":[]},{"given":"A.J.","family":"van de Goor","sequence":"additional","affiliation":[]},{"given":"M.","family":"Rodgers","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1979.1675331"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1985.1676547"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1999.805831"},{"key":"ref13","article-title":"Semiconductor Industry Association","year":"2000","journal-title":"The National Roadmap for Semiconductors"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1981.1675739"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.1996.510868"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cds:19971147"},{"key":"ref17","article-title":"Testing Semiconductor Memories, Theory and Practice","author":"van de goor","year":"1998","journal-title":"ComTex Publishing Gouda The Netherlands"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/307418.307577"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.2000.843856"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/43.55188"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2001.915069"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2000.893615"},{"key":"ref5","first-page":"169","article-title":"Moving Inversions Test Pattern is Thorough, Yet Speedy","author":"de jonge","year":"1976","journal-title":"Comp Design"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"1676","DOI":"10.1109\/43.806812","article-title":"On Comparing Functional Fault Coverage and Defect Coverage for Memory Testing","volume":"18","author":"kim","year":"1999","journal-title":"IEEE Trans on CAD"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/43.980260"},{"key":"ref2","first-page":"282","article-title":"Impact of Memory Cell Array Bridges on the Faulty Behavior in Embedded DRAMs","author":"al-ars","year":"2000","journal-title":"Proc of ATS"},{"key":"ref1","article-title":"Analysis of a Deceptive Read Destructive Memory Fault Model and Recommended Testing","author":"adams","year":"1996","journal-title":"Proc IEEE North Atlantic Test Workshop"},{"key":"ref9","first-page":"236","article-title":"Simple and Efficient Algorithms for Functional RAM Testing","author":"marinescu","year":"1982","journal-title":"Proc of Int Test Conference"}],"event":{"name":"Records of the 2002 IEEE International Workshop on Memory Technology, Design and Testing","location":"Isle of Bendor, France","acronym":"MTDT-02"},"container-title":["Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT2002)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8004\/22126\/01029769.pdf?arnumber=1029769","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,15]],"date-time":"2017-06-15T18:42:31Z","timestamp":1497552151000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1029769\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/mtdt.2002.1029769","relation":{},"subject":[]}}