{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,1]],"date-time":"2026-04-01T14:18:18Z","timestamp":1775053098016,"version":"3.50.1"},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/mtv.2003.1250255","type":"proceedings-article","created":{"date-parts":[[2004,5,6]],"date-time":"2004-05-06T20:18:03Z","timestamp":1083874683000},"page":"3-6","source":"Crossref","is-referenced-by-count":12,"title":["DeepTrans - a model-based approach to functional verification of address translation mechanisms"],"prefix":"10.1109","author":[{"given":"A.","family":"Adir","sequence":"first","affiliation":[]},{"given":"R.","family":"Emek","sequence":"additional","affiliation":[]},{"given":"Y.","family":"Katz","sequence":"additional","affiliation":[]},{"given":"A.","family":"Koyfman","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"244","article-title":"Validating the Intel Pentium4 microprocessor","author":"bentley","year":"2001","journal-title":"Proceedings of the 38th Design Automation Conference"},{"key":"ref3","article-title":"Model-based test generator for processor design verification","author":"aharon","year":"1994","journal-title":"Innovative Applications of Artificial Intelligence (IAAI)"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/HLDVT.2002.1224444"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1147\/sj.413.0386"},{"key":"ref8","first-page":"32","article-title":"Algorithms for constraint-satisfaction problems: A survey","volume":"13","author":"kumar","year":"1992","journal-title":"A I Magazine"},{"key":"ref7","first-page":"434","article-title":"Functional verification methodology for microprocessors using the Genesys test program generator-application to the &#x00D7;86 microprocessors family","author":"fournier","year":"1999","journal-title":"Desigh Automation and Test in Europe"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/217474.217542"},{"key":"ref9","first-page":"638","article-title":"Functional verification of a multiple-issue, out-of-order, superscalar Alpha processor-the DEC Alpha 21264 microprocessor","author":"taylor","year":"1998","journal-title":"Proceedings of the 35th Design Automation Conference"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/HLDVT.2002.1224432"}],"event":{"name":"4th International Workshop on Microprocessor Test and Verification - Common Challenges and Solutions","location":"Austin, TX, USA","acronym":"MTV-03"},"container-title":["Proceedings. 4th International Workshop on Microprocessor Test and Verification - Common Challenges and Solutions"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8841\/27975\/01250255.pdf?arnumber=1250255","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T18:42:13Z","timestamp":1489430533000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1250255\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/mtv.2003.1250255","relation":{},"subject":[]}}