{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,5]],"date-time":"2025-05-05T10:23:29Z","timestamp":1746440609443},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,8]]},"DOI":"10.1109\/mwscas.2013.6674772","type":"proceedings-article","created":{"date-parts":[[2013,12,4]],"date-time":"2013-12-04T21:14:10Z","timestamp":1386191650000},"page":"809-812","source":"Crossref","is-referenced-by-count":20,"title":["Comparative analysis of double gate FinFET configurations for analog circuit design"],"prefix":"10.1109","author":[{"given":"Dhruva","family":"Ghai","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Saraju P.","family":"Mohanty","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Garima","family":"Thakral","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"15","DOI":"10.1016\/j.sse.2005.07.011"},{"doi-asserted-by":"publisher","key":"13","DOI":"10.1109\/LED.2003.822661"},{"doi-asserted-by":"publisher","key":"14","DOI":"10.1109\/TCSII.2007.895324"},{"doi-asserted-by":"publisher","key":"11","DOI":"10.1109\/TED.2008.922492"},{"key":"12","first-page":"47","article-title":"A pvt aware accurate statistical logic library for high-e? metal-gate nano-cmos","author":"ghai","year":"2009","journal-title":"Proc Int Symp Quality Electronic Design"},{"doi-asserted-by":"publisher","key":"3","DOI":"10.1109\/DAC.2006.229286"},{"doi-asserted-by":"publisher","key":"2","DOI":"10.1109\/ICCD.2011.6081437"},{"doi-asserted-by":"publisher","key":"1","DOI":"10.1109\/ISSCC.2012.6176876"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1109\/16.902730"},{"doi-asserted-by":"publisher","key":"7","DOI":"10.1109\/TED.2007.908596"},{"doi-asserted-by":"publisher","key":"6","DOI":"10.1109\/TVLSI.2010.2059054"},{"doi-asserted-by":"publisher","key":"5","DOI":"10.1109\/ISQED.2008.4479745"},{"doi-asserted-by":"publisher","key":"4","DOI":"10.1109\/VLSI.Design.2010.88"},{"doi-asserted-by":"publisher","key":"9","DOI":"10.1109\/TED.2006.885649"},{"doi-asserted-by":"publisher","key":"8","DOI":"10.1109\/TED.2006.871876"}],"event":{"name":"2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)","start":{"date-parts":[[2013,8,4]]},"location":"Columbus, OH, USA","end":{"date-parts":[[2013,8,7]]}},"container-title":["2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6653322\/6674559\/06674772.pdf?arnumber=6674772","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,22]],"date-time":"2017-03-22T23:55:36Z","timestamp":1490226936000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6674772\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,8]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/mwscas.2013.6674772","relation":{},"subject":[],"published":{"date-parts":[[2013,8]]}}}