{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T10:28:27Z","timestamp":1730284107494,"version":"3.28.0"},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,8]]},"DOI":"10.1109\/mwscas.2014.6908556","type":"proceedings-article","created":{"date-parts":[[2014,9,30]],"date-time":"2014-09-30T10:54:51Z","timestamp":1412074491000},"page":"881-884","source":"Crossref","is-referenced-by-count":2,"title":["An analog front-end circuit with spike detection for implantable neural recording system design"],"prefix":"10.1109","author":[{"given":"Guanglei","family":"An","sequence":"first","affiliation":[]},{"given":"De","family":"Kanishka","sequence":"additional","affiliation":[]},{"given":"Cheng","family":"Hao","sequence":"additional","affiliation":[]},{"given":"Rehan","family":"Ahmed","sequence":"additional","affiliation":[]},{"given":"Chriswell","family":"Hutchens","sequence":"additional","affiliation":[]},{"given":"Robert L.","family":"Rennaker","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Photodiode Characteristics and Applications","first-page":"10","year":"0","key":"13"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2013.6572512"},{"key":"12","volume":"25","author":"abita","year":"2004","journal-title":"Trans Optics Communications"},{"key":"3","first-page":"144","article-title":"A 96-channel full data rate direct neural interface in 0.13? m CMOS","author":"walker","year":"2011","journal-title":"VLSI Circuits (VLSIC) 2011 Symposium on"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5434025"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.886567"},{"journal-title":"CMOS Digital Integrated Circuits Analysis & Design","year":"2002","author":"kang","key":"10"},{"key":"7","first-page":"658","article-title":"Current biased pseudo-resistor for implantable neural signal recording applications","author":"sitong","year":"2008","journal-title":"Circuits and Systems 2008 MWSCAS 2008 51st Midwest Symposium on"},{"journal-title":"A Two Stage Power Optimized Implantable Neural Amplifier Based on Cascoded Structures","year":"2013","author":"an","key":"6"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1016\/S0165-0270(99)00076-X"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2108770"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2012.6291994"},{"journal-title":"Weak Inversion in Analog and Digital Circuits","year":"2003","author":"vittoz","key":"8"}],"event":{"name":"2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)","start":{"date-parts":[[2014,8,3]]},"location":"College Station, TX, USA","end":{"date-parts":[[2014,8,6]]}},"container-title":["2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6900043\/6908326\/06908556.pdf?arnumber=6908556","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,10,14]],"date-time":"2020-10-14T11:29:18Z","timestamp":1602674958000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6908556"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,8]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/mwscas.2014.6908556","relation":{},"subject":[],"published":{"date-parts":[[2014,8]]}}}