{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T10:23:51Z","timestamp":1730283831800,"version":"3.28.0"},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,8]]},"DOI":"10.1109\/mwscas.2018.8624095","type":"proceedings-article","created":{"date-parts":[[2019,2,28]],"date-time":"2019-02-28T17:19:10Z","timestamp":1551374350000},"page":"404-407","source":"Crossref","is-referenced-by-count":1,"title":["Compact Time-Mode SAR ADC With Capacitor Flipping Bit-Cycling Operation"],"prefix":"10.1109","author":[{"given":"S. Zaniar","family":"Hoseini","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kye-Shin","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2016.2539518"},{"key":"ref11","first-page":"25722583","article-title":"A low-power pilot-DAC based column parallel 8b SAR ADC with forward error correction for CMOS image sensors","volume":"60","author":"guangyin","year":"2013","journal-title":"IEEE Trans Circ Syst -I"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2581819"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2013.6674778"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSEN.2015.2511075"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1007\/978-94-017-8798-7_35"},{"key":"ref4","first-page":"1647","article-title":"A low –power area efficient 8 bit SAR ADC using dual capacitor arrays for neural microsystems","author":"chang","year":"2009","journal-title":"IEEE EMBS"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2013761"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"1043","DOI":"10.1109\/JSSC.2012.2185338","article-title":"HermesE: A 96-channel full data rate direct neural interface in 0.13?m CMOS","volume":"47","author":"cao","year":"2012","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1002\/9780471740360.ebs0418"},{"key":"ref8","first-page":"1726","article-title":"An 8-bit single-ended ultra-lowpower SAR ADC with a novel DAC switching method and a counterbased digital control circuitry","volume":"60","author":"hu","year":"2013","journal-title":"IEEE Trans Cir and Syts-I"},{"journal-title":"Smart Cameras","year":"2009","author":"belbachir","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.831477"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2185349"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2011.2163404"}],"event":{"name":"2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)","start":{"date-parts":[[2018,8,5]]},"location":"Windsor, ON, Canada","end":{"date-parts":[[2018,8,8]]}},"container-title":["2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8610060\/8623819\/08624095.pdf?arnumber=8624095","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,24]],"date-time":"2020-08-24T01:56:11Z","timestamp":1598234171000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8624095\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,8]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/mwscas.2018.8624095","relation":{},"subject":[],"published":{"date-parts":[[2018,8]]}}}