{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,3]],"date-time":"2026-06-03T00:12:14Z","timestamp":1780445534629,"version":"3.54.1"},"reference-count":14,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,8,1]],"date-time":"2020-08-01T00:00:00Z","timestamp":1596240000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,8,1]],"date-time":"2020-08-01T00:00:00Z","timestamp":1596240000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,8,1]],"date-time":"2020-08-01T00:00:00Z","timestamp":1596240000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,8]]},"DOI":"10.1109\/mwscas48704.2020.9184698","type":"proceedings-article","created":{"date-parts":[[2020,9,2]],"date-time":"2020-09-02T20:53:58Z","timestamp":1599080038000},"page":"424-427","source":"Crossref","is-referenced-by-count":9,"title":["Dual-Purpose Metal Inter-layer Via Utilization in Monolithic Three-Dimensional (M3D) Integration"],"prefix":"10.1109","author":[{"given":"Madhava Sarma","family":"Vemuri","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Umamaheswara","family":"Rao Tida","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2011.10.025"},{"key":"ref11","author":"pavlidis","year":"2017","journal-title":"Three-Dimensional Integrated Circuit Design"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IITC-MAM.2015.7325600"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/S3S.2016.7804405"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2015.7159572"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2014.7001435"},{"key":"ref3","article-title":"Dynamic Frequency Scaling Aware Opportunistic Through-Silicon-Via Inductor Utilization in Resonant Clocking","author":"tida","year":"2018","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2014.6742994"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2338862"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240829"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.3390\/mi10100637"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2019.2919606"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203860"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2016.94"}],"event":{"name":"2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)","location":"Springfield, MA, USA","start":{"date-parts":[[2020,8,9]]},"end":{"date-parts":[[2020,8,12]]}},"container-title":["2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9178719\/9184428\/09184698.pdf?arnumber=9184698","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,28]],"date-time":"2022-06-28T21:56:10Z","timestamp":1656453370000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9184698\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,8]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/mwscas48704.2020.9184698","relation":{},"subject":[],"published":{"date-parts":[[2020,8]]}}}