{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T11:29:33Z","timestamp":1725708573888},"reference-count":13,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,8,6]],"date-time":"2023-08-06T00:00:00Z","timestamp":1691280000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,8,6]],"date-time":"2023-08-06T00:00:00Z","timestamp":1691280000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,8,6]]},"DOI":"10.1109\/mwscas57524.2023.10405908","type":"proceedings-article","created":{"date-parts":[[2024,1,31]],"date-time":"2024-01-31T18:29:15Z","timestamp":1706725755000},"page":"147-151","source":"Crossref","is-referenced-by-count":0,"title":["Electrical and Physical Evaluation of Logic Network Generation Methods for SCCG"],"prefix":"10.1109","author":[{"given":"Jair P\u00e9rez","family":"Ram\u00edrez","sequence":"first","affiliation":[{"name":"Pontificia Universidad Católica del Perú,Faculty of Science and Engineering,Lima,Perú"}]},{"given":"Carlos Silva","family":"C\u00e1rdenas","sequence":"additional","affiliation":[{"name":"Pontificia Universidad Católica del Perú,Engineering Department,Lima,Perú"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS.2018.8585570"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC.2019.8920337"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2019.2907722"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2011.5938108"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.29292\/jics.v16i3.527"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2010.5647772"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1016\/j.dam.2005.02.007"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2009.4810315"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1854153.1854167"},{"volume-title":"SwitchCraft: Um ambiente computacional para sintese e analise de redes logicas","year":"2009","author":"Callegaro","key":"ref10"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/LASCAS.2014.6820314"},{"journal-title":"Classifying n-Input Boolean Functions","first-page":"10","author":"Correia","key":"ref12"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2410764"}],"event":{"name":"2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)","start":{"date-parts":[[2023,8,6]]},"location":"Tempe, AZ, USA","end":{"date-parts":[[2023,8,9]]}},"container-title":["2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10405424\/10405847\/10405908.pdf?arnumber=10405908","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,2]],"date-time":"2024-02-02T00:05:51Z","timestamp":1706832351000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10405908\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,8,6]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/mwscas57524.2023.10405908","relation":{},"subject":[],"published":{"date-parts":[[2023,8,6]]}}}