{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T05:30:39Z","timestamp":1729661439486,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,6]]},"DOI":"10.1109\/nanoarch.2010.5510926","type":"proceedings-article","created":{"date-parts":[[2010,7,23]],"date-time":"2010-07-23T09:50:59Z","timestamp":1279878659000},"page":"59-64","source":"Crossref","is-referenced-by-count":0,"title":["Stochastic nanoscale addressing for logic"],"prefix":"10.1109","author":[{"given":"Eric","family":"Rachlin","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"John E.","family":"Savage","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1084748.1084749"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2007.70795"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1084748.1084750"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2006.869675"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2005.858587"},{"journal-title":"Reliable Computing at the Nanoscale","year":"2010","author":"rachlin","key":"ref15"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511813603"},{"journal-title":"Information Theory Inference and Learning Algorithms","year":"2003","author":"mackay","key":"ref17"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1021\/nl0345062"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"1377","DOI":"10.1126\/science.1090899","article-title":"Nanowire crossbar arrays as address decoders for integrated nanosysterns","volume":"302","author":"zhong","year":"2003","journal-title":"Science"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/j.tcs.2008.08.011"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1148015.1148018"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2006.876926"},{"key":"ref7","article-title":"Afterlife for silicon: Cmol circuit architectures","author":"ma","year":"2005","journal-title":"Proc IEEE-NANG"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1126\/science.1114757"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"112","DOI":"10.1126\/science.1081940","article-title":"Ultrahigh-density nanowire lattices and circuits","volume":"300","author":"melosh","year":"2003","journal-title":"Science"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609382"}],"event":{"name":"2010 IEEE\/ACM International Symposium on Nanoscale Architectures (NANOARCH)","start":{"date-parts":[[2010,6,17]]},"location":"Anaheim, CA, USA","end":{"date-parts":[[2010,6,18]]}},"container-title":["2010 IEEE\/ACM International Symposium on Nanoscale Architectures"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5506521\/5510921\/05510926.pdf?arnumber=5510926","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T07:21:11Z","timestamp":1497856871000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5510926\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,6]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/nanoarch.2010.5510926","relation":{},"subject":[],"published":{"date-parts":[[2010,6]]}}}