{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T00:23:14Z","timestamp":1729642994753,"version":"3.28.0"},"reference-count":11,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,6]]},"DOI":"10.1109\/newcas.2014.6934044","type":"proceedings-article","created":{"date-parts":[[2014,11,1]],"date-time":"2014-11-01T00:44:26Z","timestamp":1414802666000},"page":"309-312","source":"Crossref","is-referenced-by-count":0,"title":["A memory transaction model for Sparse Matrix-Vector multiplications on GPUs"],"prefix":"10.1109","author":[{"given":"Thalie","family":"Keklikian","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J. M.","family":"Pierre Langlois","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yvon","family":"Savaria","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"journal-title":"Efficient Sparse Matrix-Vector Multiplication on CUDA","year":"2008","author":"bell","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2008.917757"},{"year":"0","author":"davis","key":"10"},{"journal-title":"CUDA Toolkit Documentation","year":"0","key":"1"},{"key":"7","doi-asserted-by":"crossref","first-page":"152","DOI":"10.1145\/1555815.1555775","article-title":"An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness","volume":"37","author":"hong","year":"2009","journal-title":"ACM SIGARCH Comput Archit News"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1693453.1693471"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/ICPP.2010.17"},{"journal-title":"Optimizing Sparse Matrix-Vector Multiplication on GPUs","year":"2009","author":"baskaran","key":"4"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2013.123"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/CCGRID.2010.81"},{"journal-title":"Matrix Market","year":"0","author":"boisvert","key":"11"}],"event":{"name":"2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)","start":{"date-parts":[[2014,6,22]]},"location":"Trois-Rivieres, QC, Canada","end":{"date-parts":[[2014,6,25]]}},"container-title":["2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6919808\/6933969\/06934044.pdf?arnumber=6934044","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,22]],"date-time":"2017-06-22T19:26:05Z","timestamp":1498159565000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6934044\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,6]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/newcas.2014.6934044","relation":{},"subject":[],"published":{"date-parts":[[2014,6]]}}}