{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,1]],"date-time":"2025-10-01T16:22:59Z","timestamp":1759335779476},"reference-count":13,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,6,19]],"date-time":"2022-06-19T00:00:00Z","timestamp":1655596800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,6,19]],"date-time":"2022-06-19T00:00:00Z","timestamp":1655596800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,6,19]]},"DOI":"10.1109\/newcas52662.2022.9842225","type":"proceedings-article","created":{"date-parts":[[2022,8,5]],"date-time":"2022-08-05T19:33:34Z","timestamp":1659728014000},"page":"533-537","source":"Crossref","is-referenced-by-count":1,"title":["Input-Layer Neuron Implementation Using Delta-Sigma Modulators"],"prefix":"10.1109","author":[{"given":"Seyed","family":"Amirhossein Nasrollahi","sequence":"first","affiliation":[{"name":"Concordia University,Dept. of Electrical and Computer Engineering,Montreal,Canada"}]},{"given":"Anatoly","family":"Syutkin","sequence":"additional","affiliation":[{"name":"Concordia University,Dept. of Electrical and Computer Engineering,Montreal,Canada"}]},{"given":"Glenn","family":"Cowan","sequence":"additional","affiliation":[{"name":"Concordia University,Dept. of Electrical and Computer Engineering,Montreal,Canada"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2021.627221"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TBCAS.2018.2848203"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-021-22332-8"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1038\/s41467-021-23342-2"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2304638"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2018.112130359"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2019.8702500"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.3389\/fnins.2011.00073"},{"journal-title":"CMOS Mixed-Signal Circuit Design","year":"2008","author":"baker","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TNNLS.2016.2526029"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2019.2903009"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1126\/science.1225266"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2313954"}],"event":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","start":{"date-parts":[[2022,6,19]]},"location":"Quebec City, QC, Canada","end":{"date-parts":[[2022,6,22]]}},"container-title":["2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9841660\/9841947\/09842225.pdf?arnumber=9842225","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,8,16]],"date-time":"2022-08-16T02:59:02Z","timestamp":1660618742000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9842225\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,6,19]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/newcas52662.2022.9842225","relation":{},"subject":[],"published":{"date-parts":[[2022,6,19]]}}}