{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,10]],"date-time":"2025-12-10T09:03:42Z","timestamp":1765357422304,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,6,26]],"date-time":"2023-06-26T00:00:00Z","timestamp":1687737600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,6,26]],"date-time":"2023-06-26T00:00:00Z","timestamp":1687737600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,6,26]]},"DOI":"10.1109\/newcas57931.2023.10198121","type":"proceedings-article","created":{"date-parts":[[2023,8,7]],"date-time":"2023-08-07T17:49:33Z","timestamp":1691430573000},"page":"1-5","source":"Crossref","is-referenced-by-count":3,"title":["Verification of In-Memory Logic Design using ReRAM Crossbars"],"prefix":"10.1109","author":[{"given":"Kamalika","family":"Datta","sequence":"first","affiliation":[{"name":"German Research Centre for Artificial Intelligence (DFKI),Bremen,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Arighna","family":"Deb","sequence":"additional","affiliation":[{"name":"Kalinga Institute of Industrial Technology,Bhubaneswar,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fatemeh","family":"Shirinzadeh","sequence":"additional","affiliation":[{"name":"Institute of Computer Science, University of Bremen,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Abhoy","family":"Kole","sequence":"additional","affiliation":[{"name":"German Research Centre for Artificial Intelligence (DFKI),Bremen,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Saeideh","family":"Shirinzadeh","sequence":"additional","affiliation":[{"name":"German Research Centre for Artificial Intelligence (DFKI),Bremen,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rolf","family":"Drechsler","sequence":"additional","affiliation":[{"name":"German Research Centre for Artificial Intelligence (DFKI),Bremen,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2017.2750064"},{"key":"ref12","first-page":"948","article-title":"Fast Logic Synthesis for RRAM-Based in-Memory Computing Using Majority-Inverter Graphs","author":"saeideh shirinzadeh","year":"2016","journal-title":"Design Automation Test in Europe Conference Exhibition (DATE)"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2016.2570248"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"80","DOI":"10.1038\/nature06932","article-title":"The missing memristor found","volume":"453","author":"strukov","year":"2008","journal-title":"Nature"},{"key":"ref11","first-page":"337","article-title":"Z3: An efficient SMT solver","author":"de moura","year":"2008","journal-title":"International Conference on Tools and Algorithms for the Construction and Analysis of Systems"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1142\/S0218126622500712"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2488484"},{"key":"ref1","article-title":"IWLS 2005 benchmarks","author":"albrecht","year":"2005","journal-title":"Technical Report"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2018.10.001"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2018.2792474"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/54.785838"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.3850\/9783981537079_0970"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2014.2357292"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IDT.2014.7038601"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"873","DOI":"10.1038\/nature08940","article-title":"Memristive switches enable stateful logic operations via material implication","volume":"464","author":"borghetti","year":"2010","journal-title":"Nature"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DSD57027.2022.00114"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/3566097.3567842"}],"event":{"name":"2023 21st IEEE Interregional NEWCAS Conference (NEWCAS)","start":{"date-parts":[[2023,6,26]]},"location":"Edinburgh, United Kingdom","end":{"date-parts":[[2023,6,28]]}},"container-title":["2023 21st IEEE Interregional NEWCAS Conference (NEWCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10198027\/10198028\/10198121.pdf?arnumber=10198121","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,8,28]],"date-time":"2023-08-28T17:41:55Z","timestamp":1693244515000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10198121\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6,26]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/newcas57931.2023.10198121","relation":{},"subject":[],"published":{"date-parts":[[2023,6,26]]}}}