{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,24]],"date-time":"2026-03-24T21:18:36Z","timestamp":1774387116658,"version":"3.50.1"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009]]},"DOI":"10.1109\/nocs.2009.5071460","type":"proceedings-article","created":{"date-parts":[[2009,6,16]],"date-time":"2009-06-16T13:10:05Z","timestamp":1245157805000},"page":"124-133","source":"Crossref","is-referenced-by-count":235,"title":["Silicon-photonic clos networks for global on-chip communication"],"prefix":"10.1109","author":[{"given":"Ajay","family":"Joshi","sequence":"first","affiliation":[]},{"given":"Christopher","family":"Batten","sequence":"additional","affiliation":[]},{"given":"Yong-Jin","family":"Kwon","sequence":"additional","affiliation":[]},{"given":"Scott","family":"Beamer","sequence":"additional","affiliation":[]},{"given":"Imran","family":"Shamim","sequence":"additional","affiliation":[]},{"given":"Krste","family":"Asanovic","sequence":"additional","affiliation":[]},{"given":"Vladimir","family":"Stojanovic","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"17","doi-asserted-by":"publisher","DOI":"10.1007\/s00339-009-5121-6"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.35"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2006.884077"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2007.35"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373606"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1493930"},{"key":"12","article-title":"atac: on-chip optical networks for multi-core processors","author":"psota","year":"2007","journal-title":"Boston Area Architecture Workshop"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523070"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1364\/JON.6.000063"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/1183401.1183430"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/HOTI.2008.20"},{"key":"7","article-title":"leveraging optical technology in future bus-based chip multiprocessors","author":"kirman","year":"2006","journal-title":"Int'l Symp on Microar-chitecture"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2008.137"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.32"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1002\/j.1538-7305.1953.tb01433.x"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/CLEO.2008.4551588"},{"key":"8","article-title":"an 8-core 64-thread 64 b power-efficient sparc soc","author":"nawathe","year":"2007","journal-title":"Int'l Solid-State Circuits Conf"}],"event":{"name":"2009 3rd ACM\/IEEE International Symposium on Networks-on-Chip","location":"La Jolla, CA, USA","start":{"date-parts":[[2009,5,10]]},"end":{"date-parts":[[2009,5,13]]}},"container-title":["2009 3rd ACM\/IEEE International Symposium on Networks-on-Chip"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5066987\/5071428\/05071460.pdf?arnumber=5071460","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T23:58:02Z","timestamp":1489795082000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5071460\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/nocs.2009.5071460","relation":{},"subject":[],"published":{"date-parts":[[2009]]}}}