{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T17:50:16Z","timestamp":1725385816839},"reference-count":4,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,10]]},"DOI":"10.1109\/norchip.2015.7364357","type":"proceedings-article","created":{"date-parts":[[2015,12,28]],"date-time":"2015-12-28T21:35:01Z","timestamp":1451338501000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["A BW-tracking semi-digital PLL with near-optimal VCO phase noise shaping in low-cost 0.4 \u00b5m CMOS achieving 700 fs rms phase jitter"],"prefix":"10.1109","author":[{"given":"S.","family":"Fahmy","sequence":"first","affiliation":[]},{"given":"M.","family":"Dietl","sequence":"additional","affiliation":[]},{"given":"P.","family":"Sareen","sequence":"additional","affiliation":[]},{"given":"M.","family":"Ortmanns","sequence":"additional","affiliation":[]},{"given":"J.","family":"Anders","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/VDAT.2011.5783546"},{"key":"ref3","first-page":"248","article-title":"A 0.022 mm2 970 ?W dual-loop injection-locked PLL with ?243dB FOM using synthesizable all-digital PVT calibration circuits","author":"wei","year":"0","journal-title":"ISSCC 2013"},{"key":"ref2","first-page":"266","article-title":"A digitally stabilized type-III PLL using ring VCO with 1.01psrms integrated jitter in 65 nm CMOS","author":"sai","year":"0","journal-title":"ISSCC 2012"},{"key":"ref1","first-page":"266","article-title":"A 0.0066 mm2 780 ?W fully synthesizable pll with a current-output dac and an interpolative phase-coupled oscillator using edge-injection technique","author":"wei","year":"0","journal-title":"ISSCC 2014"}],"event":{"name":"2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)","start":{"date-parts":[[2015,10,26]]},"location":"Oslo, Norway","end":{"date-parts":[[2015,10,28]]}},"container-title":["2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP &amp; International Symposium on System-on-Chip (SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7360269\/7364350\/07364357.pdf?arnumber=7364357","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,25]],"date-time":"2017-03-25T00:29:29Z","timestamp":1490401769000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7364357\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,10]]},"references-count":4,"URL":"https:\/\/doi.org\/10.1109\/norchip.2015.7364357","relation":{},"subject":[],"published":{"date-parts":[[2015,10]]}}}