{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T19:52:36Z","timestamp":1725652356515},"reference-count":16,"publisher":"IEEE","license":[{"start":{"date-parts":[[2016,11,1]],"date-time":"2016-11-01T00:00:00Z","timestamp":1477958400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2016,11,1]],"date-time":"2016-11-01T00:00:00Z","timestamp":1477958400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,11]]},"DOI":"10.1109\/norchip.2016.7792897","type":"proceedings-article","created":{"date-parts":[[2016,12,24]],"date-time":"2016-12-24T08:53:48Z","timestamp":1482569628000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["Hierarchical design of a low power standing wave oscillator based clock distribution network"],"prefix":"10.1109","author":[{"given":"Wei","family":"Zhang","sequence":"first","affiliation":[{"name":"State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China"}]},{"given":"Youde","family":"Hu","sequence":"additional","affiliation":[{"name":"State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China"}]},{"given":"Yuxiang","family":"Huan","sequence":"additional","affiliation":[{"name":"State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China"}]},{"given":"Zhuo","family":"Zou","sequence":"additional","affiliation":[{"name":"State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China"}]},{"given":"Keji","family":"Cui","sequence":"additional","affiliation":[{"name":"State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China"}]},{"given":"Dongxuan","family":"Bao","sequence":"additional","affiliation":[{"name":"State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China"}]},{"given":"Dashan","family":"Pan","sequence":"additional","affiliation":[{"name":"State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China"}]},{"given":"Lebo","family":"Wang","sequence":"additional","affiliation":[{"name":"State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China"}]},{"given":"Lirong","family":"Zheng","sequence":"additional","affiliation":[{"name":"State Key Lab of ASICs & Systems, School of Information Science and Technology, Fudan University, Shanghai, China"}]}],"member":"263","reference":[{"key":"ref13","first-page":"985","article-title":"Clock distribution scheme using coplanar transmission lines","author":"cordero","year":"2008","journal-title":"Design Automation and Test in Europe(DATE)"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2005.33"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2027541"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523285"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.818299"},{"key":"ref10","first-page":"503","article-title":"A methodology for local resonant clock synthesis using LC-assisted local clockbuffers","author":"condley","year":"2011","journal-title":"IEEE\/ACM International Conference on Computer-Aided Design(ICCAD)"},{"key":"ref2","first-page":"742","article-title":"High-performance low-power resonant clocking: embedded tutorial","author":"guthaus","year":"2012","journal-title":"IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)"},{"key":"ref1","first-page":"144","article-title":"The clock distribution of the POWER4 microprocessor","author":"restle","year":"2002","journal-title":"IEEE International Solid-State Circuits Conference(ISSCC)"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2011.70"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.838005"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2190671"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007147"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228389"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024845"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2010.28"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2008.4751849"}],"event":{"name":"2016 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)","start":{"date-parts":[[2016,11,1]]},"location":"Copenhagen, Denmark","end":{"date-parts":[[2016,11,2]]}},"container-title":["2016 IEEE Nordic Circuits and Systems Conference (NORCAS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7784514\/7792873\/07792897.pdf?arnumber=7792897","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,5,1]],"date-time":"2023-05-01T10:53:03Z","timestamp":1682938383000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7792897\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,11]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/norchip.2016.7792897","relation":{},"subject":[],"published":{"date-parts":[[2016,11]]}}}