{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T04:11:40Z","timestamp":1725682300515},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,10]]},"DOI":"10.1109\/norchip.2018.8573463","type":"proceedings-article","created":{"date-parts":[[2018,12,14]],"date-time":"2018-12-14T01:07:05Z","timestamp":1544749625000},"page":"1-7","source":"Crossref","is-referenced-by-count":1,"title":["Time-Predictable Distributed Shared Memory for Multi-Core Processors"],"prefix":"10.1109","author":[{"given":"Morten B.","family":"Petersen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Anthon V.","family":"Riber","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Simon T.","family":"Andersen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Martin","family":"Schoeberl","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","article-title":"A real-time capable many-core model","author":"metzlaff","year":"2011","journal-title":"Proceedings of 32nd IEEE Real-Time Systems Symposium Work-in-Progress Session"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-54999-6_11"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2015.7293956"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2014.7094761"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2015.04.002"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2392987.2392995"},{"journal-title":"Open Core Protocol specification release 3 0","year":"2013","key":"ref16"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/NORCHP.2012.6403129"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2392987.2392995"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837353"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1155\/2009\/758480"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"1044","DOI":"10.7873\/DATE.2013.217","article-title":"An area-efficient network interface for a TDM-based network-on-chip","author":"spars\u00f8","year":"2013","journal-title":"Proceedings of the Design Automation & Test in Europe Conference DATE"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2405614"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2012.25"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342017"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2401716.2401730"}],"event":{"name":"2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)","start":{"date-parts":[[2018,10,30]]},"location":"Tallinn","end":{"date-parts":[[2018,10,31]]}},"container-title":["2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8552599\/8573449\/08573463.pdf?arnumber=8573463","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,27]],"date-time":"2022-01-27T15:03:57Z","timestamp":1643295837000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8573463\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,10]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/norchip.2018.8573463","relation":{},"subject":[],"published":{"date-parts":[[2018,10]]}}}