{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T11:13:46Z","timestamp":1730286826162,"version":"3.28.0"},"reference-count":29,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,8]]},"DOI":"10.1109\/nvmsa.2015.7304370","type":"proceedings-article","created":{"date-parts":[[2015,10,29]],"date-time":"2015-10-29T22:19:03Z","timestamp":1446157143000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Mixer: software enabled wear leveling for morphable PCM in embedded systems"],"prefix":"10.1109","author":[{"given":"Linbo","family":"Long","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Duo","family":"Liu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Liangy","family":"Liang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kan","family":"Zhong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xiao","family":"Zhu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Edwin H.-M.","family":"Sha","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669117"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1816014"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2627369.2627667"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228439"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"654","DOI":"10.1109\/TVLSI.2014.2321571","article-title":"Low Overhead Software Wear Leveling for Hybrid PCM + DRAM Main Memory on Embedded Systems","volume":"23","author":"hu","year":"2015","journal-title":"IEEE Trans VLSI Systems"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2014.07.002"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1016\/j.compositesa.2013.11.008"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2142015"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/2697394"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2012.81"},{"key":"ref28","first-page":"1450","article-title":"Application-Specific Wear Leveling for Extending Lifetime of Phase Change Memory in Embedded Systems","author":"liu","year":"2014","journal-title":"TCAD"},{"key":"ref4","first-page":"1","article-title":"ICE: Inline calibration for memristor crossbar-based computing engine","author":"li","year":"2014"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/2656075.2656076"},{"key":"ref3","first-page":"100","article-title":"Quantitative modeling of racetrack memory, a tradeoff among area, performance, and power","author":"zhang","year":"2015"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815981"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/WWC.2001.990739"},{"key":"ref5","first-page":"1","article-title":"Improving write operations in MLC phase change memory","author":"lei","year":"2012","journal-title":"HPCA"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2451512.2451547"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1147\/rd.524.0439"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2039370.2039420"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333672"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2070050"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"article-title":"Techniques for data mapping and buffering to exploit asymmetry in Multi-Level Cell (Phase Change) Memory","year":"2013","author":"yoon","key":"ref22"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6169027"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2015.2409857"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2015.7059025"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2011.5722206"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2015.7059056"}],"event":{"name":"2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA)","start":{"date-parts":[[2015,8,19]]},"location":"Hong Kong","end":{"date-parts":[[2015,8,21]]}},"container-title":["2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7295173\/7304351\/07304370.pdf?arnumber=7304370","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,19]],"date-time":"2020-08-19T20:40:08Z","timestamp":1597869608000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7304370\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,8]]},"references-count":29,"URL":"https:\/\/doi.org\/10.1109\/nvmsa.2015.7304370","relation":{},"subject":[],"published":{"date-parts":[[2015,8]]}}}