{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,26]],"date-time":"2026-03-26T16:03:59Z","timestamp":1774541039007,"version":"3.50.1"},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,8]]},"DOI":"10.1109\/nvmsa.2017.8064472","type":"proceedings-article","created":{"date-parts":[[2017,10,24]],"date-time":"2017-10-24T16:43:01Z","timestamp":1508863381000},"page":"1-6","source":"Crossref","is-referenced-by-count":11,"title":["Nonvolatile power gating with MTJ based nonvolatile flip-flops for a microprocessor"],"prefix":"10.1109","author":[{"given":"Masaru","family":"Kudo","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kimiyoshi","family":"Usami","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2012.6341281"},{"key":"ref3","author":"li","year":"2012","journal-title":"Nonvolatile Memory Design - Magnetic"},{"key":"ref6","doi-asserted-by":"crossref","DOI":"10.1109\/JPROC.2010.2064272","article-title":"Spin-transsistor Electronics: An Overview and Outloook","volume":"98","author":"sugahara","year":"2010","journal-title":"Proc IEEE"},{"key":"ref5","article-title":"A 130.7mm2 2-layer 32Gb ReRAM memory device in 24nm technology","author":"liu","year":"2013","journal-title":"ISSCC"},{"key":"ref8","article-title":"MTJ Based Non-Volatile Flip Flop to Prevent Useless Store Operation","author":"kudo","year":"2015","journal-title":"The 30th International Technical Conference on Circuits\/Systems Computers and Communications (ITC-CSCC'15)"},{"key":"ref7","article-title":"An MTJ-based Flip-Flop Circuit to Improve Robustness in Store\/Restore Operations","author":"usami","year":"2016","journal-title":"JSAP spring meeting"},{"key":"ref2","article-title":"Low Power Methodology Manual For System-on-Chip Design","author":"keating","year":"2007","journal-title":"Springer"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2010.5450407"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/774572.774593"}],"event":{"name":"2017 IEEE 6th Non-Volatile Memory Systems and Applications Symposium (NVMSA)","location":"Hsinchu, Taiwan","start":{"date-parts":[[2017,8,16]]},"end":{"date-parts":[[2017,8,18]]}},"container-title":["2017 IEEE 6th Non-Volatile Memory Systems and Applications Symposium (NVMSA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8045884\/8064454\/08064472.pdf?arnumber=8064472","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,10,4]],"date-time":"2019-10-04T23:20:56Z","timestamp":1570231256000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8064472\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,8]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/nvmsa.2017.8064472","relation":{},"subject":[],"published":{"date-parts":[[2017,8]]}}}