{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T11:14:11Z","timestamp":1730286851879,"version":"3.28.0"},"reference-count":28,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,8,18]],"date-time":"2021-08-18T00:00:00Z","timestamp":1629244800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,8,18]],"date-time":"2021-08-18T00:00:00Z","timestamp":1629244800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,8,18]],"date-time":"2021-08-18T00:00:00Z","timestamp":1629244800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,8,18]]},"DOI":"10.1109\/nvmsa53655.2021.9628460","type":"proceedings-article","created":{"date-parts":[[2021,12,6]],"date-time":"2021-12-06T21:09:10Z","timestamp":1638824950000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["OCTO+: Optimized Checkpointing of B+ Trees for Non-Volatile Main Memory Wear-Leveling"],"prefix":"10.1109","author":[{"given":"Christian","family":"Hakert","sequence":"first","affiliation":[]},{"given":"Roland","family":"Kuhn","sequence":"additional","affiliation":[]},{"given":"Kuan-Hsun","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Jian-Jia","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Jens","family":"Teubner","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1145\/2024724.2024939"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/DATE.2010.5456923"},{"key":"ref12","article-title":"Software wear management for persistent memories","author":"gogte","year":"0","journal-title":"17th USENIX Conference on File and Storage Technologies (FAST&#x2019;19)"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1145\/3380446.3430624"},{"key":"ref14","article-title":"Softwear: Software-only in-memory wear-leveling for non-volatile main memory","author":"hakert","year":"0","journal-title":"ArXiv Preprint"},{"key":"ref15","first-page":"1","article-title":"Split&#x2019;n trace nvm: Leveraging library oses for semantic memory tracing","author":"hakert","year":"2020","journal-title":"2020 9th Non-Volatile Memory Systems and Applications Symposium (NVMSA)"},{"doi-asserted-by":"publisher","key":"ref16","DOI":"10.1109\/ASP-DAC47756.2020.9045418"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1016\/j.sysarc.2019.101658"},{"key":"ref18","first-page":"81","author":"khan","year":"2019","journal-title":"Sensing of Phase-Change Memory"},{"doi-asserted-by":"publisher","key":"ref19","DOI":"10.23919\/DATE.2019.8715132"},{"doi-asserted-by":"publisher","key":"ref28","DOI":"10.1109\/ACCESS.2018.2875820"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1145\/3131848"},{"key":"ref27","doi-asserted-by":"crossref","first-page":"37","DOI":"10.1145\/1555815.1555759","article-title":"A durable and energy efficient main memory using phase change memory technology","volume":"37","author":"zhou","year":"2009","journal-title":"ACM SIGARCH Computer Architecture News"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"39","DOI":"10.1145\/2024716.2024718","article-title":"The gem5 simulator","volume":"39","author":"binkert","year":"2011","journal-title":"ACM SIGARCH Computer Architecture News"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1145\/2228360.2228439"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1145\/2905364"},{"key":"ref8","first-page":"35","article-title":"Adapting b+-tree for emerging nonvolatile memory-based main memory","volume":"35","author":"chi","year":"2015","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.14778\/2752939.2752947"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1145\/3187009.3164147"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1145\/2627369.2627667"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1145\/1807128.1807152"},{"doi-asserted-by":"publisher","key":"ref20","DOI":"10.1145\/2882903.2915251"},{"doi-asserted-by":"publisher","key":"ref22","DOI":"10.1145\/2366231.2337203"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.1109\/LCA.2015.2402435"},{"doi-asserted-by":"publisher","key":"ref24","DOI":"10.1109\/ICCD50377.2020.00101"},{"doi-asserted-by":"publisher","key":"ref23","DOI":"10.1145\/1669112.1669117"},{"doi-asserted-by":"publisher","key":"ref26","DOI":"10.1109\/PCCC.2015.7410326"},{"key":"ref25","first-page":"65","article-title":"Nv-tree: A consistent and workload-adaptive tree structure for non-volatile memory","volume":"65","author":"yang","year":"2015","journal-title":"IEEE Transactions on Computers"}],"event":{"name":"2021 IEEE 10th Non-Volatile Memory Systems and Applications Symposium (NVMSA)","start":{"date-parts":[[2021,8,18]]},"location":"Beijing, China","end":{"date-parts":[[2021,8,20]]}},"container-title":["2021 IEEE 10th Non-Volatile Memory Systems and Applications Symposium (NVMSA)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9628140\/9628406\/09628460.pdf?arnumber=9628460","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T16:53:51Z","timestamp":1652201631000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9628460\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,8,18]]},"references-count":28,"URL":"https:\/\/doi.org\/10.1109\/nvmsa53655.2021.9628460","relation":{},"subject":[],"published":{"date-parts":[[2021,8,18]]}}}