{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,9]],"date-time":"2026-07-09T05:59:53Z","timestamp":1783576793570,"version":"3.55.0"},"reference-count":22,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/pact.2002.1106013","type":"proceedings-article","created":{"date-parts":[[2003,6,26]],"date-time":"2003-06-26T00:51:07Z","timestamp":1056588667000},"page":"141-152","source":"Crossref","is-referenced-by-count":47,"title":["Integrating adaptive on-chip storage structures for reduced dynamic power"],"prefix":"10.1109","author":[{"given":"S.","family":"Dropsho","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"A.","family":"Buyuktosunoglu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"R.","family":"Balasubramonian","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"D.H.","family":"Albonesi","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"S.","family":"Dwarkadas","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"G.","family":"Semeraro","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"G.","family":"Magklis","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"M.L.","family":"Scottt","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1999.808593"},{"key":"ref11","doi-asserted-by":"crossref","DOI":"10.1109\/ISCA.2002.1003572","article-title":"Simple techniques for reducing leakage power","author":"flautner","year":"2002","journal-title":"29th Annual International Symposium on Computer Architecture"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2001.937452"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2001.955040"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2001.937453"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1998.727028"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1993.282742"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2001.991108"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2001.991105"},{"key":"ref19","article-title":"Load latency tolerance in dynamically scheduled processors","author":"srinivasan","year":"1999","journal-title":"Journal of Instruction-Level Parallelism"},{"key":"ref4","article-title":"Wattch: a framework for architectural-level power analysis and optimizations","author":"albonesi","year":"2000","journal-title":"27th Annual International Symposium on Computer Architecture"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/40.782564"},{"key":"ref6","article-title":"Albonesi, Stanley Schuster, David Brooks, Pradip Bose, and Peter Cook. A circuit level implementation of an adaptive issue queue for power-aware microprocessors","author":"alper","year":"2001","journal-title":"Great Lakes VLSI Symposium"},{"key":"ref5","author":"burger","year":"1997","journal-title":"The simplescalar toolset version 2 0 Technical Report TR-97&#x2013;1342"},{"key":"ref8","year":"1999","journal-title":"Compaq Alpha 21264 Microprocessor Hardware Reference Manual Technical report Compaq Computer Corporation"},{"key":"ref7","article-title":"An adaptive issue queue for reduced power at high performance","author":"buyuktosunoglu","year":"2000","journal-title":"Workshop on Power-Aware Computer Systems in conjunction with the 9th International Conference on Architectural Support for Programming Languages and Operating Systems"},{"key":"ref2","article-title":"Albonesi, Alper Buyuk-tosunoglu, and Sandhya Dwarkadas. Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures","author":"rajeev","year":"2000","journal-title":"Proceedings of the 33rd International Symposium on Microarchitecture"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1999.809463"},{"key":"ref9","doi-asserted-by":"crossref","DOI":"10.1109\/ISCA.2002.1003581","article-title":"Managing multi-configurable hardware via dynamic working set analysis","author":"dhodapkar","year":"2002","journal-title":"29th Annual International Symposium on Computer Architecture"},{"key":"ref20","article-title":"POWER4 System Microarchitecture. Technical report, IBM Server Group","author":"tendler","year":"2001"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2001.903259"},{"key":"ref21","article-title":"Alpha processors: A history of power issues and a look to the future","author":"wilcox","year":"1999","journal-title":"Cool-Chips Tutorial"}],"event":{"name":"2002 International Conference on Parallel Architectures and Compilation Techniques. PACT 2002","location":"Charlottesville, VA, USA","acronym":"PACT-02"},"container-title":["Proceedings.International Conference on Parallel Architectures and Compilation Techniques"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8167\/24312\/01106013.pdf?arnumber=1106013","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,15]],"date-time":"2017-06-15T22:45:39Z","timestamp":1497566739000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1106013\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":22,"URL":"https:\/\/doi.org\/10.1109\/pact.2002.1106013","relation":{},"subject":[]}}