{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T11:24:50Z","timestamp":1730287490378,"version":"3.28.0"},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,10]]},"DOI":"10.1109\/pais.2018.8598527","type":"proceedings-article","created":{"date-parts":[[2019,1,3]],"date-time":"2019-01-03T23:07:51Z","timestamp":1546556871000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Towards formal verification of cryptographic circuits: A functional approach"],"prefix":"10.1109","author":[{"given":"BITAT","family":"Abir","sequence":"first","affiliation":[]},{"given":"MERNIZ","family":"Salah","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/FIT.2014.49"},{"key":"ref11","article-title":"Vale: Verifying high-performance cryptographic assembly code","author":"bond","year":"2017","journal-title":"Proceedings of the USENIX Security Symposium"},{"key":"ref12","article-title":"Verification of pipelined ciphers","author":"lam","year":"2009","journal-title":"Master’s thesis"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.5402\/2012\/271836"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2013.131"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2011.2157687"},{"key":"ref6","article-title":"Vrification Formelle des systmes numriques par dmonstration de thormes: application aux composants cryptographiques","author":"toma","year":"2006","journal-title":"Doctoral dissertation"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1314436.1314442"},{"key":"ref8","first-page":"827","article-title":"A single-chip FPGA implementation of the data encryption standard (DES) algorithm. In Global Telecommunications Conference","volume":"2","author":"wong","year":"1998","journal-title":"The Bridge to Global Integration IEEE"},{"key":"ref7","first-page":"194","article-title":"Design automation for cryptographic hardware using functional languages","author":"wolfs","year":"2011","journal-title":"Proceedings of the 32nd WIC Symposium on Information Theory in the Benelux"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/s00165-007-0028-5"},{"journal-title":"Introduction to Formal Hardware Verification","year":"2013","author":"kropf","key":"ref1"},{"journal-title":"Design of High Performance MIPS Cryptography Processor Based on T-DES Algorithm","year":"0","author":"singh","key":"ref9"}],"event":{"name":"2018 3rd International Conference on Pattern Analysis and Intelligent Systems (PAIS)","start":{"date-parts":[[2018,10,24]]},"location":"Tebessa","end":{"date-parts":[[2018,10,25]]}},"container-title":["2018 3rd International Conference on Pattern Analysis and Intelligent Systems (PAIS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8579098\/8598478\/08598527.pdf?arnumber=8598527","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T01:15:34Z","timestamp":1643159734000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8598527\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,10]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/pais.2018.8598527","relation":{},"subject":[],"published":{"date-parts":[[2018,10]]}}}