{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T12:16:47Z","timestamp":1730290607506,"version":"3.28.0"},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,7]]},"DOI":"10.1109\/prime.2018.8430344","type":"proceedings-article","created":{"date-parts":[[2018,8,17]],"date-time":"2018-08-17T15:56:49Z","timestamp":1534521409000},"page":"77-80","source":"Crossref","is-referenced-by-count":2,"title":["A Simulated Approach to Evaluate Side Channel Attack Countermeasures for the Advanced Encryption Standard"],"prefix":"10.1109","author":[{"given":"Luca","family":"Sarti","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luca","family":"Baldanzi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luca","family":"Crocetti","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Berardino","family":"Carnevale","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Luca","family":"Fanucci","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/APEMC.2013.7360641"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-01004-0_13"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2005.1465670"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"413","DOI":"10.1007\/11502760_28","article-title":"A sidechannel analysis resistant description of the aes s-box","author":"oswald","year":"2005","journal-title":"Fast Software Encryption Third International Workshop"},{"journal-title":"Logic Synthesis Using Synopsys","year":"2012","author":"kurup","key":"ref14"},{"journal-title":"VCS Verilog Simulator","year":"2004","key":"ref15"},{"key":"ref16","article-title":"Expanding the synopsys primetime solution with power analysis","author":"yip","year":"2006","journal-title":"Synopsys Inc"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCITECHN.2008.4802973"},{"key":"ref3","first-page":"441","article-title":"197: Advanced encryption standard (aes)","volume":"197","author":"pub","year":"2001","journal-title":"Federal Information Processing Standards Publication"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2016.7428087"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2013.6613952"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2013.219"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1002\/0471457566.ch2"},{"journal-title":"The Design of RIJNDAEL AES-The Advanced Encryption Standard","year":"2013","author":"daemen","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSEMR.2014.7043664"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISEMC.2015.7256163"}],"event":{"name":"2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)","start":{"date-parts":[[2018,7,2]]},"location":"Prague","end":{"date-parts":[[2018,7,5]]}},"container-title":["2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8410979\/8430100\/08430344.pdf?arnumber=8430344","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,8,23]],"date-time":"2020-08-23T23:03:43Z","timestamp":1598223823000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8430344\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,7]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/prime.2018.8430344","relation":{},"subject":[],"published":{"date-parts":[[2018,7]]}}}