{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,3]],"date-time":"2026-07-03T15:17:27Z","timestamp":1783091847020,"version":"3.54.6"},"reference-count":12,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,6,18]],"date-time":"2023-06-18T00:00:00Z","timestamp":1687046400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,6,18]],"date-time":"2023-06-18T00:00:00Z","timestamp":1687046400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,6,18]]},"DOI":"10.1109\/prime58259.2023.10161781","type":"proceedings-article","created":{"date-parts":[[2023,6,29]],"date-time":"2023-06-29T13:21:05Z","timestamp":1688044865000},"page":"273-276","source":"Crossref","is-referenced-by-count":6,"title":["A PWM-DAC for Analog In-Memory Computing in Mixed-Signal Accelerators"],"prefix":"10.1109","author":[{"given":"Francesco","family":"Malena","sequence":"first","affiliation":[{"name":"University of Parma,Department of Engineering and Architecture,Parma,Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Andrea","family":"Boni","sequence":"additional","affiliation":[{"name":"University of Parma,Department of Engineering and Architecture,Parma,Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Michele","family":"Caselli","sequence":"additional","affiliation":[{"name":"University of Parma,Department of Engineering and Architecture,Parma,Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2981901"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2952773"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICTA53157.2021.9661898"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2642198"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3214064"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2022.3174622"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2022.3200515"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3031290"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS50681.2021.9462775"},{"key":"ref10","first-page":"36","article-title":"A Fully Integrated Reprogrammable CMOSRRAM Compute-in-Memory Coprocessor for Neuromorphic Applications","volume":"6","author":"correll","year":"2020","journal-title":"IEEE JESSCDC"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2880918"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3064189"}],"event":{"name":"2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","location":"Valencia, Spain","start":{"date-parts":[[2023,6,18]]},"end":{"date-parts":[[2023,6,21]]}},"container-title":["2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10161731\/10161695\/10161781.pdf?arnumber=10161781","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,7,17]],"date-time":"2023-07-17T13:34:25Z","timestamp":1689600865000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10161781\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,6,18]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/prime58259.2023.10161781","relation":{},"subject":[],"published":{"date-parts":[[2023,6,18]]}}}