{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T07:09:14Z","timestamp":1725779354266},"reference-count":11,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,6,9]],"date-time":"2024-06-09T00:00:00Z","timestamp":1717891200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,6,9]],"date-time":"2024-06-09T00:00:00Z","timestamp":1717891200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,6,9]]},"DOI":"10.1109\/prime61930.2024.10559672","type":"proceedings-article","created":{"date-parts":[[2024,6,25]],"date-time":"2024-06-25T19:18:00Z","timestamp":1719343080000},"page":"1-4","source":"Crossref","is-referenced-by-count":0,"title":["A 4T GC-eDRAM Bitcell with Differential Readout Mechanism For High Performance Applications"],"prefix":"10.1109","author":[{"given":"Roman","family":"Golman","sequence":"first","affiliation":[{"name":"Bar Ban University,EnICS Labs, Faculty of Engineering,Ramat Gan,Israel,5290002"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Avinoam","family":"Segev","sequence":"additional","affiliation":[{"name":"Bar Ban University,EnICS Labs, Faculty of Engineering,Ramat Gan,Israel,5290002"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Adam","family":"Teman","sequence":"additional","affiliation":[{"name":"Bar Ban University,EnICS Labs, Faculty of Engineering,Ramat Gan,Israel,5290002"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"volume-title":"IEEE International Roadmap for Devices and Systems (IRDS) - 2023 Update","key":"ref1"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/MTDT.2007.4547603"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/ACCESS.2023.3310940"},{"key":"ref4","first-page":"322","article-title":"IOT Diff.-Signal SRAM Design in a 14-nm FinFET Techn. for High-Speed Application","author":"Ichihashi","year":"2018","journal-title":"IEEE SOCC"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/JSSC.2007.917509"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1007\/978-3-319-60402-2"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/ISCAS.2014.6865600"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/ACCESS.2021.3099970"},{"key":"ref9","first-page":"1","article-title":"4T GC Providing Unlimited Availability through Hidden Refresh with lWIR Functionality","author":"Levy","year":"2021","journal-title":"IEEE ISCAS"},{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/JSSC.2011.2128150"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/ISCAS45731.2020.9180875"}],"event":{"name":"2024 19th Conference on PhD Research in Microelectronics and Electronics (PRIME)","start":{"date-parts":[[2024,6,9]]},"location":"Larnaca, Cyprus","end":{"date-parts":[[2024,6,12]]}},"container-title":["2024 19th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10559643\/10559661\/10559672.pdf?arnumber=10559672","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,6,26]],"date-time":"2024-06-26T05:04:26Z","timestamp":1719378266000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10559672\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,6,9]]},"references-count":11,"URL":"https:\/\/doi.org\/10.1109\/prime61930.2024.10559672","relation":{},"subject":[],"published":{"date-parts":[[2024,6,9]]}}}