{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,4]],"date-time":"2025-06-04T05:25:53Z","timestamp":1749014753317,"version":"3.37.3"},"reference-count":13,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,7,17]],"date-time":"2022-07-17T00:00:00Z","timestamp":1658016000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,7,17]],"date-time":"2022-07-17T00:00:00Z","timestamp":1658016000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100006190","name":"Research and Development","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100006190","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,7,17]]},"DOI":"10.1109\/rcar54675.2022.9872281","type":"proceedings-article","created":{"date-parts":[[2022,9,5]],"date-time":"2022-09-05T20:31:54Z","timestamp":1662409914000},"page":"681-686","source":"Crossref","is-referenced-by-count":2,"title":["A Bin-by-Bin Calibration with Neural Network for FPGA-Based Tapped-Delay-Line Time-to-Digital Converter"],"prefix":"10.1109","author":[{"given":"Yue","family":"Xu","sequence":"first","affiliation":[{"name":"Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences,Suzhou,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jie","family":"Xie","sequence":"additional","affiliation":[{"name":"Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences,Suzhou,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhiwei","family":"Xing","sequence":"additional","affiliation":[{"name":"Harbin Institute of Technology,Shenzhen,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wenqiang","family":"Yuan","sequence":"additional","affiliation":[{"name":"Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences,Suzhou,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guanqun","family":"Yu","sequence":"additional","affiliation":[{"name":"Shanghaitech University,School of Physical Science and Technology,Shanghai,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhongmin","family":"Zeng","sequence":"additional","affiliation":[{"name":"Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences,Suzhou,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Baoshun","family":"Zhang","sequence":"additional","affiliation":[{"name":"Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences,Suzhou,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dongmin","family":"Wu","sequence":"additional","affiliation":[{"name":"Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences,Suzhou,China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/NSSMIC.2011.6154362"},{"year":"2011","journal-title":"Cyclone IV Device Handbook","key":"ref11"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/TNS.2006.869820"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1088\/1674-1137\/37\/10\/106102"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/TIM.2020.2984929"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1088\/1748-0221\/15\/11\/T11005"},{"key":"ref6","first-page":"281","author":"daigneault","year":"2010","journal-title":"A novel 10 ps resolution TDC architecture implemented in a 130nm process FPGA"},{"key":"ref5","first-page":"3440","author":"wu","year":"2008","journal-title":"The 10-ps wave union TDC Improving FPGA TDC resolution beyond its cell delay"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.1109\/TNS.2014.2320325"},{"key":"ref7","first-page":"279","author":"wu","year":"2009","journal-title":"On-Chip processing for the wave union TDC implemented in FPGA"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1002\/cta.2936"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/JSSC.2018.2868315"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/TNS.2017.2768082"}],"event":{"name":"2022 IEEE International Conference on Real-time Computing and Robotics (RCAR)","start":{"date-parts":[[2022,7,17]]},"location":"Guiyang, China","end":{"date-parts":[[2022,7,22]]}},"container-title":["2022 IEEE International Conference on Real-time Computing and Robotics (RCAR)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9872150\/9872152\/09872281.pdf?arnumber=9872281","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,9,26]],"date-time":"2022-09-26T21:11:38Z","timestamp":1664226698000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9872281\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,7,17]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/rcar54675.2022.9872281","relation":{},"subject":[],"published":{"date-parts":[[2022,7,17]]}}}