{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T21:12:26Z","timestamp":1725397946625},"reference-count":31,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,11]]},"DOI":"10.1109\/reconfig.2016.7857193","type":"proceedings-article","created":{"date-parts":[[2017,2,16]],"date-time":"2017-02-16T17:20:29Z","timestamp":1487265629000},"page":"1-8","source":"Crossref","is-referenced-by-count":1,"title":["Thread shadowing: On the effectiveness of error detection at the hardware thread level"],"prefix":"10.1109","author":[{"given":"Sebastian","family":"Meisner","sequence":"first","affiliation":[]},{"given":"Marco","family":"Platzner","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref31","article-title":"How long does it take to develop and launch government satellite systems?","author":"davis","year":"2015","journal-title":"International Cost Estimating and Analysis Association” AEROSPACE REPORT"},{"journal-title":"Soft Error Mitigation Using Prioritized Essential Bits Xilinx Inc","year":"2012","key":"ref30"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-05960-0_30"},{"key":"ref11","first-page":"212","article-title":"Comparison of thread signatures for error detection in hybrid multi-cores","year":"2015","journal-title":"Field Programmable Technology (FPT) 2015 International Conference on ser FPT"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1723112.1723154"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2012.6339177"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2011.5981519"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2014.7082803"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2011.5981512"},{"journal-title":"LogiCORE IP Soft Error Mitigation Controller v4 1 Xilinx Inc","year":"2014","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/2380356.2380375"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2008.62"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2013.12.012"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.110"},{"article-title":"Acceleration of fpga fault injection through multi-bit testing","year":"0","author":"cieslewski","key":"ref27"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2231101"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2005.854207"},{"journal-title":"Xilinx Inc Virtex-6 FPGA Configuration User Guide (UG360)","year":"2015","key":"ref29"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1723112.1723152"},{"key":"ref8","first-page":"29","article-title":"Accuracy-performance tradeoffs on an fpga through overclocking","author":"shi","year":"2013","journal-title":"Field-Programmable Custom Computing Machines (FCCM) 2013 IEEE 21st Annual International Symposium on"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2009.22"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2013.110"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2012.6416745"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2006.311336"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176589"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176590"},{"key":"ref21","article-title":"Relaxed determinism: Making redundant execution on multiprocessors practical","author":"pool","year":"0","journal-title":"Proc of 11th Workshop on Hot Topics in Operating Systems (HOTOS07) 2007"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2004.14"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/2.585157"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2012.6339175"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1088\/1748-0221\/9\/01\/C01025"}],"event":{"name":"2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","start":{"date-parts":[[2016,11,30]]},"location":"Cancun, Mexico","end":{"date-parts":[[2016,12,2]]}},"container-title":["2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7838017\/7856931\/07857193.pdf?arnumber=7857193","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,1]],"date-time":"2017-03-01T17:47:51Z","timestamp":1488390471000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7857193\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,11]]},"references-count":31,"URL":"https:\/\/doi.org\/10.1109\/reconfig.2016.7857193","relation":{},"subject":[],"published":{"date-parts":[[2016,11]]}}}