{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T07:01:00Z","timestamp":1725519660473},"reference-count":26,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,12]]},"DOI":"10.1109\/reconfig.2018.8641694","type":"proceedings-article","created":{"date-parts":[[2019,2,14]],"date-time":"2019-02-14T23:39:16Z","timestamp":1550187556000},"page":"1-8","source":"Crossref","is-referenced-by-count":1,"title":["A Composable Workflow for Productive Heterogeneous Computing on FPGAs via Whole-Program Analysis and Transformation"],"prefix":"10.1109","author":[{"given":"Paul","family":"Sathre","sequence":"first","affiliation":[]},{"given":"Ahmed E.","family":"Helal","sequence":"additional","affiliation":[]},{"given":"Wu-chun","family":"Feng","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Intel fpga sdk for opencl Best practices guide","year":"0","key":"ref10"},{"journal-title":"Altera SDK for OpenCL Best Practice Guide","year":"0","key":"ref11"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1880153.1880157"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2482767.2482791"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2014.6868650"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2188286.2188341"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/InPar.2012.6339595"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306797"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2010.5650274"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/1735688.1735702"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICPADS.2011.48"},{"journal-title":"Compute Unified Device Architecture Programming Guide","year":"2007","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2013.09.003"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICPPW.2012.15"},{"journal-title":"A C Language Family Frontend for LLVM","year":"2013","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2807591.2807621"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/HOTCHIPS.2009.7478342"},{"journal-title":"Extra Clang Tools 8 Documentation LLVM\/Clang","year":"0","key":"ref9"},{"key":"ref1","article-title":"The OpenCL Specification, 2008","author":"munshi","year":"0","journal-title":"Khronos OpenCL Working Group"},{"key":"ref20","first-page":"10","article-title":"CHO: Towards a Benchmark´ Suite for OpenCL FPGA Accelerators","author":"ndu","year":"2015","journal-title":"Proc 3rd IEEE Int Workshop VS"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ICSE.1996.493398"},{"journal-title":"Advanced Compiler Design Implementation","year":"1997","author":"muchnick","key":"ref21"},{"key":"ref24","first-page":"1","article-title":"LLVM and Clang: Next Generation Compiler Technology","author":"lattner","year":"2008","journal-title":"The BSD Conference"},{"key":"ref23","article-title":"Two Approaches to Interprocedural Data Flow Analysis","author":"sharir","year":"1978","journal-title":"Dept of Computer Science Univ of York Tech Rep"},{"key":"ref26","doi-asserted-by":"crossref","DOI":"10.1109\/IISWC.2017.8167754","article-title":"AutoMatch: An Automated Framework for Relative Performance Estimation and Workload Distribution on Heterogeneous HPC Systems","author":"helal","year":"2017","journal-title":"Workload Characterization (IISWC) 2017 IEEE International Symposium on"},{"key":"ref25","first-page":"11","article-title":"MetaMorph: A Library Framework for Interoperable Kernels on Multi- and Many-core Clusters","author":"helal","year":"2016","journal-title":"Proceedings of the International Conference for High Performance Computing Networking Storage and Analysis"}],"event":{"name":"2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","start":{"date-parts":[[2018,12,3]]},"location":"Cancun, Mexico","end":{"date-parts":[[2018,12,5]]}},"container-title":["2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8637084\/8641689\/08641694.pdf?arnumber=8641694","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,27]],"date-time":"2022-01-27T07:31:52Z","timestamp":1643268712000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8641694\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,12]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/reconfig.2018.8641694","relation":{},"subject":[],"published":{"date-parts":[[2018,12]]}}}