{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,11]],"date-time":"2025-09-11T18:44:23Z","timestamp":1757616263822,"version":"3.44.0"},"reference-count":5,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,12,1]],"date-time":"2019-12-01T00:00:00Z","timestamp":1575158400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,12,1]],"date-time":"2019-12-01T00:00:00Z","timestamp":1575158400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,12]]},"DOI":"10.1109\/reconfig48160.2019.8994730","type":"proceedings-article","created":{"date-parts":[[2020,2,14]],"date-time":"2020-02-14T03:23:28Z","timestamp":1581650608000},"page":"1-2","source":"Crossref","is-referenced-by-count":3,"title":["Efficient Utilization of DSPs and BRAMs Revisited: New AES-GCM Recipes on FPGAs"],"prefix":"10.1109","author":[{"given":"Elif Bilge","family":"Kavun","sequence":"first","affiliation":[{"name":"The University of Sheffield,Sheffield,UK"}]},{"given":"Nele","family":"Mentens","sequence":"additional","affiliation":[{"name":"Imec-COSIC and ES&#x0026;S, KU Leuven,ESAT,Leuven,Belgium"}]},{"given":"Jo","family":"Vliegen","sequence":"additional","affiliation":[{"name":"Imec-COSIC and ES&#x0026;S, KU Leuven,ESAT,Leuven,Belgium"}]},{"given":"Tolga","family":"Yal\u00e7\u0131n","sequence":"additional","affiliation":[{"name":"Northern Arizona University,Flagstaff,AZ,US"}]}],"member":"263","reference":[{"journal-title":"UltraScale Architecture DSP Slice User Guide UG579","year":"2019","key":"ref4"},{"journal-title":"Tech Rep SP800-38D","article-title":"Recommendation for Block Cipher Modes of Operation: Ga-lois\/Counter Mode (GCM) and GMAC","year":"2007","key":"ref3"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-00641-8_20"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-04722-4"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2008.42"}],"event":{"name":"2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","start":{"date-parts":[[2019,12,9]]},"location":"Cancun, Mexico","end":{"date-parts":[[2019,12,11]]}},"container-title":["2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8974168\/8994692\/08994730.pdf?arnumber=8994730","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,9,5]],"date-time":"2025-09-05T18:14:25Z","timestamp":1757096065000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8994730\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,12]]},"references-count":5,"URL":"https:\/\/doi.org\/10.1109\/reconfig48160.2019.8994730","relation":{},"subject":[],"published":{"date-parts":[[2019,12]]}}}