{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,31]],"date-time":"2025-12-31T04:53:25Z","timestamp":1767156805555,"version":"3.28.0"},"reference-count":18,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,12,1]],"date-time":"2019-12-01T00:00:00Z","timestamp":1575158400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,12,1]],"date-time":"2019-12-01T00:00:00Z","timestamp":1575158400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,12,1]],"date-time":"2019-12-01T00:00:00Z","timestamp":1575158400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,12]]},"DOI":"10.1109\/reconfig48160.2019.8994796","type":"proceedings-article","created":{"date-parts":[[2020,2,14]],"date-time":"2020-02-14T08:23:28Z","timestamp":1581668608000},"page":"1-8","source":"Crossref","is-referenced-by-count":37,"title":["A Catalog and In-Hardware Evaluation of Open-Source Drop-In Compatible RISC-V Softcore Processors"],"prefix":"10.1109","author":[{"given":"Carsten","family":"Heinz","sequence":"first","affiliation":[]},{"given":"Yannick","family":"Lavan","sequence":"additional","affiliation":[]},{"given":"Jaco","family":"Hofmann","sequence":"additional","affiliation":[]},{"given":"Andreas","family":"Koch","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Western Digital Corporation SweRV","year":"2019","key":"ref10"},{"journal-title":"Piccolo","year":"2019","key":"ref11"},{"journal-title":"The Flute","year":"2019","key":"ref12"},{"journal-title":"Vexriscv","year":"2019","key":"ref13"},{"journal-title":"PicoRV32 - A Size-Optimized RISC-V CPU","year":"2019","author":"wolf","key":"ref14"},{"journal-title":"Ariane RISC-V CPU","year":"2019","author":"zaruba","key":"ref15"},{"journal-title":"Shakti E-Class processor","year":"2019","key":"ref16"},{"key":"ref17","article-title":"Exploring coremark a benchmark maximizing simplicity and efficacy","author":"gal-on","year":"2019","journal-title":"The Embedded Microprocessor Benchmark Consortium 2012"},{"journal-title":"Embench Open benchmarks for embedded platforms","year":"2019","author":"bennett","key":"ref18"},{"journal-title":"About - SiFive","year":"2019","key":"ref4"},{"journal-title":"Western digital delivers new innovations to drive open standard interfaces and RISC-V processor development","year":"2018","key":"ref3"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2016.12"},{"key":"ref5","article-title":"The rocket chip generator","author":"asanovic","year":"2016","journal-title":"EECS Department University of California Berkeley Tech Rep UCB\/EECS-2009-3"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.23919\/FPL.2017.8056766"},{"journal-title":"RISC-V Cores and SoC Overview","year":"2019","author":"gielda","key":"ref7"},{"key":"ref2","article-title":"The RISC-V Instruction Set Manual, Volume I: Base User-Level ISA","volume":"116","author":"waterman","year":"2011","journal-title":"Technical Report UCB\/EECS-2011–82 EECS Department UC Berkeley"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-17227-5_16"},{"journal-title":"Orca","year":"2019","key":"ref9"}],"event":{"name":"2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","start":{"date-parts":[[2019,12,9]]},"location":"Cancun, Mexico","end":{"date-parts":[[2019,12,11]]}},"container-title":["2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8974168\/8994692\/08994796.pdf?arnumber=8994796","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,15]],"date-time":"2022-07-15T03:09:13Z","timestamp":1657854553000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8994796\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,12]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/reconfig48160.2019.8994796","relation":{},"subject":[],"published":{"date-parts":[[2019,12]]}}}