{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,2]],"date-time":"2025-08-02T19:02:17Z","timestamp":1754161337795,"version":"3.41.2"},"reference-count":14,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,12,1]],"date-time":"2019-12-01T00:00:00Z","timestamp":1575158400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,12,1]],"date-time":"2019-12-01T00:00:00Z","timestamp":1575158400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,12]]},"DOI":"10.1109\/reconfig48160.2019.8994806","type":"proceedings-article","created":{"date-parts":[[2020,2,14]],"date-time":"2020-02-14T03:23:28Z","timestamp":1581650608000},"page":"1-5","source":"Crossref","is-referenced-by-count":0,"title":["Cycle-Accurate Debugging of Multi-clock Reconfigurable Systems"],"prefix":"10.1109","author":[{"given":"Habib ul Hasan","family":"Khan","sequence":"first","affiliation":[{"name":"Technische Universität Dresden (TUD),Dresden,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"G\u00f6khan","family":"Akg\u00fcn","sequence":"additional","affiliation":[{"name":"Technische Universität Dresden (TUD),Dresden,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ariel","family":"Podlubne","sequence":"additional","affiliation":[{"name":"Technische Universität Dresden (TUD),Dresden,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Felix","family":"Wegener","sequence":"additional","affiliation":[{"name":"Ruhr University Bochum (RUB),Bochum,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Amir","family":"Moradi","sequence":"additional","affiliation":[{"name":"Ruhr University Bochum (RUB),Bochum,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Diana","family":"G\u00f6hringer","sequence":"additional","affiliation":[{"name":"Technische Universität Dresden (TUD),Dresden,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","article-title":"Globally asynchronous, locally synchronous circuits: Overview and outlook","volume":"24","author":"krstic","year":"2007","journal-title":"IEEE Design & Test of Computers"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2010.71"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/11745853_14"},{"key":"ref13","article-title":"PRINCE - A Low-Latency Block Cipher for Pervasive Computing Applications - Extended Abstract","author":"borghoff","year":"2012","journal-title":"ASIACRYPT"},{"key":"ref14","article-title":"An Intrusive Dynamic Reconfigurable Cycle-Accurate Debugging System for Embedded Processors","author":"habib","year":"2018","journal-title":"International Symposium on Applied Reconfigurable Computing"},{"key":"ref4","article-title":"A breakpoint-based silicon debug technique with cycle-granularity for handshake-based So C","author":"chen","year":"2015","journal-title":"Proc 2015 Design Automation & Test in Europe (DATE)"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2014.7035363"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2017.36"},{"key":"ref5","article-title":"A run-pause-resume silicon debug technique for multiple clock domain systems","author":"shuo-lian","year":"2017","journal-title":"Proc International Test Conference Asia (ITC-Asia)"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2252030"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2016.7929530"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2039811"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2008.66"},{"key":"ref9","article-title":"FPGA debugging by a device start and stop approach","author":"habib","year":"2016","journal-title":"International Conference on Reconfigurable Computing and FPGAs (ReConFig)"}],"event":{"name":"2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","start":{"date-parts":[[2019,12,9]]},"location":"Cancun, Mexico","end":{"date-parts":[[2019,12,11]]}},"container-title":["2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8974168\/8994692\/08994806.pdf?arnumber=8994806","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,28]],"date-time":"2025-07-28T19:42:25Z","timestamp":1753731745000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8994806\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,12]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/reconfig48160.2019.8994806","relation":{},"subject":[],"published":{"date-parts":[[2019,12]]}}}