{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T14:28:32Z","timestamp":1725632912753},"reference-count":30,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,7]]},"DOI":"10.1109\/recosoc.2013.6581541","type":"proceedings-article","created":{"date-parts":[[2013,8,28]],"date-time":"2013-08-28T21:13:41Z","timestamp":1377724421000},"page":"1-8","source":"Crossref","is-referenced-by-count":5,"title":["Component based design using constraint programming for module placement on FPGAs"],"prefix":"10.1109","author":[{"given":"Alexander","family":"Wold","sequence":"first","affiliation":[]},{"given":"Dirk","family":"Koch","sequence":"additional","affiliation":[]},{"given":"Jim","family":"Torresen","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2000259"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2011.151"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1016\/S0377-2217(02)00123-6"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2010.52"},{"key":"16","first-page":"6","article-title":"Heterogeneous floorplanning for FPGAs","author":"mehta","year":"2006","journal-title":"19th International Conference on VLSI Design Held Jointly with 5th International Conference on Embedded Systems Design (VLSID'06) IEEE"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2005.1568523"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2044902"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1145\/1862648.1862654"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2009.5272402"},{"journal-title":"Spartan-6 Family Overview Summary of Spartan-6 FPGA Features","first-page":"1","year":"2011","key":"21"},{"journal-title":"Configurable Logic Block with and Gate for Efficient Multiplication in FPGAS","first-page":"1","year":"2010","key":"20"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt.2009.0009"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2010.54"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2006.311209"},{"key":"25","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2012.17"},{"key":"26","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2011.146"},{"journal-title":"Altera's Partial Reconfiguration Flow","year":"2011","author":"bourgeault","key":"27"},{"key":"28","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511615320"},{"journal-title":"Yassl","year":"2013","key":"29"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2010.90"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/CJECE.2007.364333"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2006.311273"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1995.477415"},{"year":"0","key":"30"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/FPGA.1999.803706"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1287\/mnsc.44.3.388"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2007.31"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2010.5540985"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1145\/1278349.1278350"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2001.915093"}],"event":{"name":"2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)","start":{"date-parts":[[2013,7,10]]},"location":"Darmstadt, Germany","end":{"date-parts":[[2013,7,12]]}},"container-title":["2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6575424\/6581516\/06581541.pdf?arnumber=6581541","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T03:28:56Z","timestamp":1490239736000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6581541\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,7]]},"references-count":30,"URL":"https:\/\/doi.org\/10.1109\/recosoc.2013.6581541","relation":{},"subject":[],"published":{"date-parts":[[2013,7]]}}}