{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T21:37:52Z","timestamp":1729633072337,"version":"3.28.0"},"reference-count":23,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,5]]},"DOI":"10.1109\/recosoc.2014.6861357","type":"proceedings-article","created":{"date-parts":[[2014,7,29]],"date-time":"2014-07-29T21:16:18Z","timestamp":1406668578000},"page":"1-6","source":"Crossref","is-referenced-by-count":4,"title":["Power efficient Thermally Assisted Switching Magnetic memory based memory systems"],"prefix":"10.1109","author":[{"given":"Sophiane","family":"Senni","sequence":"first","affiliation":[]},{"given":"Lionel","family":"Torres","sequence":"additional","affiliation":[]},{"given":"Gilles","family":"Sassatelli","sequence":"additional","affiliation":[]},{"given":"Anastasiia","family":"Bukto","sequence":"additional","affiliation":[]},{"given":"Bruno","family":"Mussard","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2007.4439244"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2009.4798259"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/46\/7\/074002"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228406"},{"journal-title":"Match in Place A Novel Way to Perform Secure and Fast Users Authentication","year":"0","author":"cambou","key":"23"},{"key":"15","article-title":"Power and performance of read-write aware hybrid caches with Non-volatile Memories","author":"wu","year":"2009","journal-title":"Design Automation and Test in Europe (DATE)"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687448"},{"key":"13","doi-asserted-by":"crossref","first-page":"554","DOI":"10.1145\/1391469.1391610","article-title":"Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement","author":"dong","year":"2008","journal-title":"DAC08 Proceesings of the 45th Annual Design Automation Conference ACM"},{"key":"14","doi-asserted-by":"crossref","first-page":"34","DOI":"10.1145\/1555815.1555761","article-title":"Hybrid cache architecture with disparate memory technologies","volume":"37","author":"wu","year":"2009","journal-title":"ACM SIGARCH Computer Architecture News"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2012.6322869"},{"key":"12","doi-asserted-by":"crossref","first-page":"24","DOI":"10.1109\/ISCA.1995.524546","article-title":"The SPLASH-2 programs: characterization and methodological considerations","author":"woo","year":"1995","journal-title":"Proceedings 22nd Annual International Symposium on Computer Architecture ISCA"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1145\/1534916.1534918"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2004.840847"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2008.4629974"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevLett.74.3273"},{"key":"1","article-title":"SEU, SET and SEFI Test Results of a Hardened 16Mbit MRAM Device","author":"hafer","year":"2012","journal-title":"Radiation Effects Data Workshop"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/2024716.2024718"},{"key":"7","article-title":"Sttram scaling and retention failure","volume":"17","author":"naeimi","year":"2013","journal-title":"Intel Technology Journal"},{"journal-title":"Tech Trends Details on Everspins ST-MRAM","year":"0","author":"lewotsky","key":"6"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1088\/0953-8984\/19\/16\/165218"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1088\/0022-3727\/46\/7\/074001"},{"key":"9","article-title":"Cacti 60: A tool to model large caches","volume":"2007","author":"muralimanohar","year":"2009","journal-title":"Published in International Symposium on Microarchitecture Chicago"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"}],"event":{"name":"2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)","start":{"date-parts":[[2014,5,26]]},"location":"Montpellier, France","end":{"date-parts":[[2014,5,28]]}},"container-title":["2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6851790\/6860682\/06861357.pdf?arnumber=6861357","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,7,15]],"date-time":"2023-07-15T16:06:03Z","timestamp":1689437163000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6861357\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,5]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/recosoc.2014.6861357","relation":{},"subject":[],"published":{"date-parts":[[2014,5]]}}}