{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T13:05:53Z","timestamp":1730293553208,"version":"3.28.0"},"reference-count":27,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,9,24]],"date-time":"2020-09-24T00:00:00Z","timestamp":1600905600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,9,24]],"date-time":"2020-09-24T00:00:00Z","timestamp":1600905600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,9,24]],"date-time":"2020-09-24T00:00:00Z","timestamp":1600905600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,9,24]]},"DOI":"10.1109\/rsp51120.2020.9244859","type":"proceedings-article","created":{"date-parts":[[2020,11,4]],"date-time":"2020-11-04T21:13:22Z","timestamp":1604524402000},"page":"1-7","source":"Crossref","is-referenced-by-count":2,"title":["A combined fast\/cycle accurate simulation tool for reconfigurable accelerator evaluation: application to distributed data management"],"prefix":"10.1109","author":[{"given":"Erwan","family":"Lenormand","sequence":"first","affiliation":[]},{"given":"Thierry","family":"Goubier","sequence":"additional","affiliation":[]},{"given":"Loic","family":"Cudennec","sequence":"additional","affiliation":[]},{"given":"Henri-Pierre","family":"Charles","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","article-title":"Merging the Publish-Subscribe Pattern with the Shared Memory Paradigm","author":"cudennec","year":"2018","journal-title":"Euro-Par 2018 Parallel Processing Workshops"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2018.2856978"},{"journal-title":"An Introduction to CCIX White Paper","year":"2019","key":"ref12"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"473","DOI":"10.1109\/TCAD.2011.2110592","article-title":"High-level synthesis for fpgas: From prototyping to deployment","volume":"30","author":"cong","year":"2011","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"ref14","first-page":"1","article-title":"Codesigning accelerators and soc interfaces using gem5-aladdin","author":"shao","year":"2016","journal-title":"2016 49th Annual IEEE\/ACM International Symposium on Microarchitecture (MICRO)"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372595"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2016.2615617"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.23919\/FPL.2017.8056775"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/2024716.2024718","article-title":"The gem5 simulator","volume":"39","author":"binkert","year":"2011","journal-title":"SIGARCH Comput Archit News"},{"key":"ref19","doi-asserted-by":"crossref","first-page":"335","DOI":"10.1145\/2370816.2370865","article-title":"Multi2Sim: A Simulation Framework for CPU-GPU Computing","author":"rafael ubal","year":"2012","journal-title":"In International Conference on Parallel Architectures and Compilation Techniques (PACT)"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"18","DOI":"10.1109\/2.485843","article-title":"Treadmarks: shared memory computing on networks of workstations","volume":"29","author":"amza","year":"1996","journal-title":"Computer"},{"key":"ref27","doi-asserted-by":"crossref","DOI":"10.1145\/2049662.2049663","article-title":"The university of florida sparse matrix collection","volume":"38","author":"davis","year":"2011","journal-title":"ACM Trans Math Softw"},{"key":"ref3","first-page":"94","article-title":"IVY: a shared virtual memory system for parallel computing","author":"li","year":"1988","journal-title":"Proc 1988 Intl Conf on Parallel Processing"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"2353","DOI":"10.1016\/j.procs.2016.05.439","article-title":"Implementing openshmem for the adapteva epiphany risc array processor","volume":"80","author":"ross","year":"2016","journal-title":"Procedia Computer Science"},{"key":"ref5","first-page":"45","article-title":"JuxMem: An Adaptive Supportive Platform for Data Sharing on the Grid","volume":"6","author":"antoniu","year":"2005","journal-title":"Scalable Computing Practice and Experience"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/2749246.2749250"},{"key":"ref7","first-page":"291","article-title":"Latency-tolerant software distributed shared memory","author":"nelson","year":"2015","journal-title":"2015 USENIX Annual Technical Conference (USENIX ATC 15)"},{"journal-title":"High-performance conjugate gradient (hpcg) benchmark results","year":"2020","key":"ref2"},{"key":"ref9","article-title":"Software-Distributed Shared Memory over heterogeneous micro-server architecture","author":"cudennec","year":"2017","journal-title":"Euro-Par 2017 Parallel Processing Workshops"},{"key":"ref1","first-page":"2","article-title":"Heterogeneity in response to the power wall","volume":"35","author":"eeckhout","year":"2015","journal-title":"IEEE Micro"},{"journal-title":"Verilator the fast free verilog simulator","year":"2012","author":"snyder","key":"ref20"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1999946.1999969"},{"key":"ref21","doi-asserted-by":"crossref","first-page":"494","DOI":"10.1109\/ICECS.2008.4674898","article-title":"A software performance simulation methodology for rapid system architecture exploration","author":"kirchsteiger","year":"2008","journal-title":"2008 15th IEEE International Conference on Electronics, Circuits and Systems"},{"key":"ref24","first-page":"36","article-title":"Simulation-based circuit-activity estimation for fpgas containing hard blocks","author":"seeley","year":"2017","journal-title":"2017 International Symposium on Rapid System Prototyping (RSP)"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3388617"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/355791.355796"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/DASIP48288.2019.9049195"}],"event":{"name":"2020 IEEE International Workshop on Rapid System Prototyping (RSP)","start":{"date-parts":[[2020,9,24]]},"location":"Hamburg, Germany","end":{"date-parts":[[2020,9,25]]}},"container-title":["2020 International Workshop on Rapid System Prototyping (RSP)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9244848\/9244849\/09244859.pdf?arnumber=9244859","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,28]],"date-time":"2022-06-28T21:53:49Z","timestamp":1656453229000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9244859\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,9,24]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/rsp51120.2020.9244859","relation":{},"subject":[],"published":{"date-parts":[[2020,9,24]]}}}