{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T21:33:57Z","timestamp":1729632837150,"version":"3.28.0"},"reference-count":25,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,7]]},"DOI":"10.1109\/samos.2011.6045462","type":"proceedings-article","created":{"date-parts":[[2011,10,18]],"date-time":"2011-10-18T15:33:32Z","timestamp":1318952012000},"page":"200-208","source":"Crossref","is-referenced-by-count":3,"title":["Fully-automatic derivation of exact program-flow constraints for a tighter worst-case execution-time analysis"],"prefix":"10.1109","author":[{"given":"Amine","family":"Marref","sequence":"first","affiliation":[]}],"member":"263","reference":[{"key":"ref10","article-title":"Worst-case execution-time analysis for digital signal processors","author":"holsti","year":"2000","journal-title":"Proceedings of the EUSIPCO 2000 Conference (X European Signal Processing Conference)"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICPPW.2006.26"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/EMRTS.2001.933993"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/REAL.1995.495219"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-16561-0_41"},{"year":"2010","key":"ref15"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISORC.2011.25"},{"journal-title":"Inductive Logic Programming","year":"1992","author":"muggleton","key":"ref17"},{"key":"ref18","article-title":"From trusted annotations to verified knowledge","author":"prantl","year":"2009","journal-title":"Proc Int Workshop Worst-Case Execution Time Anal"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1023\/A:1007905003094"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/268806.268810"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICECCS.2011.9"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"168","DOI":"10.1007\/978-3-540-24730-2_15","article-title":"A tool for checking ANSI-C programs","author":"clarke","year":"2004","journal-title":"Tools and Algorithms for the Construction and Analysis of Systems"},{"key":"ref5","article-title":"Static timing analysis and program proof","author":"chapman","year":"1995","journal-title":"Ph D Dissertation"},{"key":"ref8","first-page":"79","article-title":"Merging techniques for faster derivation of WCET flow information using abstract execution","author":"gustafsson","year":"2008","journal-title":"6th Intl Workshop on Worst-Case Execution Time (WCET) Analysis"},{"journal-title":"Genetic Algorithms in Search Optimization and Machine Learning","year":"1989","author":"goldberg","key":"ref7"},{"article-title":"lpsolve, version 5.5.15","year":"2010","author":"berkelaar","key":"ref2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008189014032"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/CEC.2008.4631277"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/WISES.2008.4623310"},{"key":"ref22","article-title":"Analysis of path exclusion at the machine code level","author":"stein","year":"2007","journal-title":"Proc of the 7th International Workshop on Worst-Case Execution Time Analysis (WCET'07)"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/S1383-7621(99)00010-7"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/1347375.1347389"},{"key":"ref23","first-page":"230","article-title":"On computable numbers, with an application to the entscheidungsproblem","volume":"42","author":"turing","year":"1936","journal-title":"Proceedings of the London Mathematical Society"},{"journal-title":"Integer Programming","year":"1998","author":"wolsey","key":"ref25"}],"event":{"name":"2011 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XI)","start":{"date-parts":[[2011,7,18]]},"location":"Samos, Greece","end":{"date-parts":[[2011,7,21]]}},"container-title":["2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6036614\/6045429\/06045462.pdf?arnumber=6045462","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T08:12:36Z","timestamp":1497946356000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6045462\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,7]]},"references-count":25,"URL":"https:\/\/doi.org\/10.1109\/samos.2011.6045462","relation":{},"subject":[],"published":{"date-parts":[[2011,7]]}}}