{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T21:04:47Z","timestamp":1729631087320,"version":"3.28.0"},"reference-count":24,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,7]]},"DOI":"10.1109\/samos.2012.6404190","type":"proceedings-article","created":{"date-parts":[[2013,1,17]],"date-time":"2013-01-17T20:29:49Z","timestamp":1358454589000},"page":"302-309","source":"Crossref","is-referenced-by-count":9,"title":["An FPGA-based probability-aware fault simulator"],"prefix":"10.1109","author":[{"given":"David","family":"May","sequence":"first","affiliation":[]},{"given":"Walter","family":"Stechele","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/43.712103"},{"journal-title":"Efficient Shift Registers LFSR Counters and Long Pseudo-Random Sequence Generators","year":"1996","author":"alfke","key":"22"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/DDECS.2006.1649634"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1989.100747"},{"key":"18","doi-asserted-by":"crossref","first-page":"245","DOI":"10.1109\/DFTVS.2002.1173521","article-title":"Using run-time reconfiguration for fault injection in hardware prototypes","author":"antoni","year":"2002","journal-title":"Defect and Fault Tolerance in VLSI Systems 2002 DFT 2002 Proceedings 17th IEEE International Symposium On IEEE"},{"key":"24","article-title":"Characteristics of the itc99 benchmark circuits","author":"davidson","year":"1999","journal-title":"International Test Synthesis Workshop (ITSW)"},{"key":"15","doi-asserted-by":"crossref","first-page":"1487","DOI":"10.1109\/43.790625","article-title":"Fault emulation: A new methodology for fault grading","volume":"18","author":"cheng","year":"1999","journal-title":"Computer-Aided Design of Integrated Circuits and Systems IEEE Transactions on"},{"key":"16","first-page":"17","article-title":"A novel approach to fpga-based hardware fault modeling and simulation","author":"parreira","year":"2003","journal-title":"Design and Diagnostics of Electronic Circuits and Syst Workshop"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/DFTVS.2001.966775"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/ICEOE.2011.6013043"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/VDAT.2011.5783561"},{"key":"12","first-page":"18","article-title":"Error-rate prediction for probabilistic circuits with more general structures","author":"lau","year":"2010","journal-title":"The 16th Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI2010)"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2006.889115"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-387-74909-9_7"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1023\/A:1015079004512"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.145"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1977.1050947"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/DELTA.2010.18"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.47"},{"key":"6","first-page":"59","article-title":"Evaluating circuit reliability under probabilistic gate-level fault models","author":"patel","year":"2003","journal-title":"Int Workshop Logic Synthesis"},{"key":"5","first-page":"78","article-title":"Probability analysis of combination systems and their reliability","author":"levin","year":"1964","journal-title":"Eng Cybernetics"},{"key":"4","first-page":"535","article-title":"A probabilistic cmos switch and its realization by exploiting noise","author":"cheemalavagu","year":"2005","journal-title":"IFIP International Conference on VLSI"},{"key":"9","doi-asserted-by":"crossref","first-page":"158","DOI":"10.1145\/1176760.1176781","article-title":"Probabilistic arithmetic and energy efficient embedded signal processing","author":"george","year":"2006","journal-title":"Proceedings of the 2006 International Conference on Compilers Architecture and Synthesis for Embedded Systems ACM"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1143\/JJAP.45.3307"}],"event":{"name":"2012 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XII)","start":{"date-parts":[[2012,7,16]]},"location":"Samos, Greece","end":{"date-parts":[[2012,7,19]]}},"container-title":["2012 International Conference on Embedded Computer Systems (SAMOS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6389877\/6404141\/06404190.pdf?arnumber=6404190","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,2,6]],"date-time":"2022-02-06T04:53:02Z","timestamp":1644123182000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6404190\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,7]]},"references-count":24,"URL":"https:\/\/doi.org\/10.1109\/samos.2012.6404190","relation":{},"subject":[],"published":{"date-parts":[[2012,7]]}}}