{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T09:33:50Z","timestamp":1729676030805,"version":"3.28.0"},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,7]]},"DOI":"10.1109\/samos.2015.7363664","type":"proceedings-article","created":{"date-parts":[[2015,12,28]],"date-time":"2015-12-28T16:37:08Z","timestamp":1451320628000},"page":"96-102","source":"Crossref","is-referenced-by-count":1,"title":["Framework for parameter analysis of FPGA-based image processing architectures"],"prefix":"10.1109","author":[{"given":"Marc","family":"Reichenbach","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Benjamin","family":"Pfundt","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dietmar","family":"Fey","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1542275.1542313"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/SYNASC.2014.70"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISORCW.2012.39"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488797"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/S0736-5845(99)00040-X"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1062261.1062264"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/509593.509605"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2012.6416727"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1366230.1366271"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2002.1016538"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISORCW.2011.25"},{"journal-title":"Pattern Classification","year":"2003","author":"duda","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-74899-8"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"75","DOI":"10.15803\/ijnc.3.1_75","article-title":"Pipelined Execution of Windowed Image Computations","volume":"3","author":"vaidyanathan","year":"2013","journal-title":"International journal of Computers Networks"}],"event":{"name":"2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)","start":{"date-parts":[[2015,7,19]]},"location":"Samos, Greece","end":{"date-parts":[[2015,7,23]]}},"container-title":["2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7358369\/7363643\/07363664.pdf?arnumber=7363664","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,10,14]],"date-time":"2020-10-14T10:19:46Z","timestamp":1602670786000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/7363664"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,7]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/samos.2015.7363664","relation":{},"subject":[],"published":{"date-parts":[[2015,7]]}}}