{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,12]],"date-time":"2026-01-12T20:45:27Z","timestamp":1768250727670,"version":"3.49.0"},"reference-count":69,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,7]]},"DOI":"10.1109\/samos.2016.7818357","type":"proceedings-article","created":{"date-parts":[[2017,1,20]],"date-time":"2017-01-20T02:30:13Z","timestamp":1484879413000},"page":"268-274","source":"Crossref","is-referenced-by-count":10,"title":["From reversible logic to quantum circuits: Logic design for an emerging technology"],"prefix":"10.1109","author":[{"given":"Robert","family":"Wille","sequence":"first","affiliation":[]},{"given":"Anupam","family":"Chattopadhyay","sequence":"additional","affiliation":[]},{"given":"Rolf","family":"Drechsler","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"crossref","first-page":"163","DOI":"10.1007\/978-3-319-08494-7_13","article-title":"Mapping NCV circuits to optimized Clifford+T circuits","author":"miller","year":"2014","journal-title":"Conf Reversible Computation"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2244643"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1145\/2897937.2898107"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2011.144"},{"key":"ref31","doi-asserted-by":"crossref","first-page":"703","DOI":"10.1109\/TCAD.2009.2017215","article-title":"Exact multiple-control toffoli network synthesis with sat techniques","volume":"28","author":"grosse","year":"2009","journal-title":"IEEE Trans on CAD"},{"key":"ref30","article-title":"Complexity analysis of reversible logic synthesis","volume":"abs 1402 491","author":"chattopadhyay","year":"2014","journal-title":"CoRR"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2013.6509587"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/1366110.1366168"},{"key":"ref35","first-page":"288","article-title":"Elementary quantum gate realizations for multiple-control Toffolli gates","author":"miller","year":"2011","journal-title":"Int'l Symp on Multi-Valued Logic"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.249"},{"key":"ref60","doi-asserted-by":"publisher","DOI":"10.1109\/ISMVL.2014.28"},{"key":"ref62","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2011.77"},{"key":"ref61","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2005.9"},{"key":"ref63","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2004.84"},{"key":"ref28","article-title":"Embedding of large Boolean functions for reversible logic","author":"soeken","year":"2014","journal-title":"CoRR"},{"key":"ref64","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2011.29"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2006.244176"},{"key":"ref65","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-013-5399-3"},{"key":"ref66","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2012.6164942"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2013.08.002"},{"key":"ref67","first-page":"55","article-title":"Revkit: A toolkit for reversible circuit design","volume":"18","author":"soeken","year":"2012","journal-title":"Multiple-Valued Logic and Soft Computing"},{"key":"ref68","article-title":"Basic circuit compilation techniques for an ion-trap quantum machine","volume":"abs 1603 7678","author":"maslov","year":"2016","journal-title":"CoRR"},{"key":"ref69","article-title":"Quantum Programming Language","year":"0"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/237814.237866"},{"key":"ref1","author":"nielsen","year":"2000","journal-title":"Quantum Computation and Quantum Information"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-20520-0_16"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ISMVL.2014.26"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1629984"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2012.6165069"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISMVL.2015.21"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2459034"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1016\/j.jsc.2015.03.002"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1007\/s11128-010-0201-2"},{"key":"ref51","article-title":"Integrated synthesis of linear nearest neighbor ancillafree met circuits","author":"rahman","year":"2016","journal-title":"Int'l Symp on Multi-Valued Logic"},{"key":"ref59","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2747921"},{"key":"ref58","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2015.7059001"},{"key":"ref57","first-page":"495","article-title":"Determining the minimal number of swap gates for multi-dimensional nearest neighbor quantum circuits","author":"shafaei","year":"2014","journal-title":"ASP Design Automation Conf"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2016.7428026"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2356463"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488785"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/ICQNM.2009.25"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/ISMVL.2016.48"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISMVL.2011.40"},{"key":"ref11","article-title":"Synthesis and optimization of reversible circuits - a survey","author":"saeedi","year":"2011","journal-title":"ACM Computing Surveys"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2014.2341953"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775915"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.847911"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISMVL.2015.37"},{"key":"ref15","first-page":"307","article-title":"Reversible logic synthesis through ant colony optimization","author":"li","year":"2010","journal-title":"Design Automation and Test in Europe"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI-SoC.2015.7314431"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1007\/11750321_35"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.Design.2009.40"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.871622"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1038\/414883a"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/SFCS.1994.365700"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.86.032324"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.54.1098"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/3-540-10003-2_104"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/2746539.2746608"},{"key":"ref49","doi-asserted-by":"crossref","first-page":"237","DOI":"10.26421\/QIC4.4-1","article-title":"Implementation of Shor's algorithm on a linear nearest neighbour qubit array","volume":"4","author":"fowler","year":"2004","journal-title":"Quantum Inform Comput"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.52.3457"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228368"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.62.052309"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1145\/1364782.1364787"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1145\/1126257.1126259"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2227518"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.87.042302"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-20860-2_16"},{"key":"ref43","article-title":"Quantum computation roadmap","year":"0"}],"event":{"name":"2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)","location":"Agios Konstantinos, Samos Island, Greece","start":{"date-parts":[[2016,7,17]]},"end":{"date-parts":[[2016,7,21]]}},"container-title":["2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7803477\/7818316\/07818357.pdf?arnumber=7818357","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,22]],"date-time":"2022-07-22T06:40:35Z","timestamp":1658472035000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7818357\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,7]]},"references-count":69,"URL":"https:\/\/doi.org\/10.1109\/samos.2016.7818357","relation":{},"subject":[],"published":{"date-parts":[[2016,7]]}}}