{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T13:20:30Z","timestamp":1730294430287,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,7]]},"DOI":"10.1109\/samos.2017.8344625","type":"proceedings-article","created":{"date-parts":[[2018,4,23]],"date-time":"2018-04-23T19:33:43Z","timestamp":1524512023000},"page":"171-178","source":"Crossref","is-referenced-by-count":2,"title":["Exposed datapath optimizations for loop scheduling"],"prefix":"10.1109","author":[{"given":"Heikki O.","family":"Kultala","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pekka O.","family":"Jaaskelainen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Johannes","family":"IJzerman","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lasse K.","family":"Lehtonen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Timo T.","family":"Viitanen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Markku J.","family":"Makitalo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jarmo H.","family":"Takala","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2011.6045474"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2016.7818355"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1014192.802449"},{"key":"ref13","first-page":"65070x-1","article-title":"Codesign toolset for application-specific instruction-set processors","author":"j\u00e4\u00e4skel\u00e4inen","year":"2007","journal-title":"Proc SPIE Multimedia on Mobile Devices"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/355841.355847"},{"journal-title":"Stream Sustainable Memory Bandwidth in High Performance Computers","year":"2001","author":"mccalpin","key":"ref15"},{"key":"ref16","first-page":"715","article-title":"DSPSTONE: A DSP-oriented benchmarking methodology","author":"zivojnovi?","year":"1994","journal-title":"Proc Int Conf Signal Process"},{"key":"ref17","first-page":"59:1","article-title":"Integer linear programming-based scheduling for transport triggered architectures","volume":"12","author":"\u00e4ij\u00e4","year":"2015","journal-title":"ACM Trans Archit Code Optim"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/53990.54022"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/CADS.2015.7377786"},{"journal-title":"Code Generation for Transport Triggered Architectures","year":"1996","author":"hoogerbrugge","key":"ref6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1186\/1687-3963-2013-9"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICESS.2008.18"},{"key":"ref7","first-page":"80","article-title":"Integrated register allocation and software pipelining","author":"janssen","year":"1998","journal-title":"Proceedings of the fourth Annual Conference of the Advanced School for Computing and Imaging Cite-seer"},{"key":"ref2","first-page":"23","article-title":"Impact of software bypassing on instruction level parallelism and register file traffic","volume":"5114","author":"guzma","year":"2008","journal-title":"Embedded Computer Systems Architectures Modeling and Simulation Ser Lecture Notes in Computer Science"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.3233\/ICA-1998-5103"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-014-0924-x"}],"event":{"name":"2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)","start":{"date-parts":[[2017,7,17]]},"location":"Pythagorion","end":{"date-parts":[[2017,7,20]]}},"container-title":["2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8337645\/8344598\/08344625.pdf?arnumber=8344625","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T00:47:06Z","timestamp":1643158026000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8344625\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,7]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/samos.2017.8344625","relation":{},"subject":[],"published":{"date-parts":[[2017,7]]}}}