{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T22:23:20Z","timestamp":1725488600476},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,9]]},"DOI":"10.1109\/sarnof.2016.7846753","type":"proceedings-article","created":{"date-parts":[[2017,2,9]],"date-time":"2017-02-09T16:42:12Z","timestamp":1486658532000},"page":"19-21","source":"Crossref","is-referenced-by-count":1,"title":["FPGA-accelerated simulation of a hybrid-ARQ system using high level synthesis"],"prefix":"10.1109","author":[{"given":"Swapnil","family":"Mhaske","sequence":"first","affiliation":[]},{"given":"Hojin","family":"Kee","sequence":"additional","affiliation":[]},{"given":"Tai","family":"Ly","sequence":"additional","affiliation":[]},{"given":"Predrag","family":"Spasojevic","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCRD.2010.186"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2012.6339191"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1090\/dimacs\/066\/19"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCOM.1985.1096314"},{"journal-title":"Error Control Coding","year":"2004","author":"costello","key":"ref14"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2010.2089551"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2006.382066"},{"key":"ref17","first-page":"1","article-title":"IEEE Standard for Wireless MAN-Advanced Air Interface for Broadband Wireless Access Systems","year":"2012","journal-title":"IEEE Std 802 16 1–2012"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/CISS.2015.7086845"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/VTCSpring.2013.6692638"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/PIMRC.2011.6139944"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VTCFall.2015.7390967"},{"key":"ref5","article-title":"Rapid and high-level constraint-driven prototyping using LabVIEW FPGA","author":"kee","year":"2014","journal-title":"2014 IEEE GlobalSIP 2014"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2220388"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSAC.2009.090816"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ICC.1993.397441"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1962.1057683"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2011360"}],"event":{"name":"2016 IEEE 37th Sarnoff Symposium","start":{"date-parts":[[2016,9,19]]},"location":"Newark, NJ, USA","end":{"date-parts":[[2016,9,21]]}},"container-title":["2016 IEEE 37th Sarnoff Symposium"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7833433\/7846718\/07846753.pdf?arnumber=7846753","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,10,2]],"date-time":"2017-10-02T21:32:23Z","timestamp":1506979943000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7846753\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,9]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/sarnof.2016.7846753","relation":{},"subject":[],"published":{"date-parts":[[2016,9]]}}}