{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T00:27:24Z","timestamp":1729643244099,"version":"3.28.0"},"reference-count":19,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/sbcci.2003.1232830","type":"proceedings-article","created":{"date-parts":[[2004,1,23]],"date-time":"2004-01-23T23:33:03Z","timestamp":1074900783000},"page":"205-210","source":"Crossref","is-referenced-by-count":3,"title":["Modeling a reconfigurable system for computing the FFT in place via rewriting-logic"],"prefix":"10.1109","author":[{"given":"M.","family":"Ayala-Rincon","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"R.B.","family":"Nogueira","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"C.H.","family":"Llanos","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"R.P.","family":"Jacobi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"R.W.","family":"Hartenstein","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1972.5009071"},{"key":"ref11","article-title":"Hardware Synthesis from Term Rewriting Systems","author":"hoe","year":"1999","journal-title":"Tech Report 421A Laboratory for Computer Science"},{"key":"ref12","article-title":"Theorem Proving Support for Hardware Verification","author":"kapur","year":"2000","journal-title":"invited talk Third Int Workshop on First-Order Theorem Proving"},{"key":"ref13","first-page":"103","article-title":"Mechanizing Verification of Arithmetic Circuits: SRT Division","volume":"1346","author":"kapur","year":"1997","journal-title":"Proc 17th FSTTCS LNCS"},{"key":"ref14","doi-asserted-by":"crossref","first-page":"32","DOI":"10.1007\/PL00010808","article-title":"Using and Induction Prover for Verifying Arithmetic Circuits","volume":"3","author":"kapur","year":"2000","journal-title":"International Journal on Software Tools for Technology Transfer"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"119","DOI":"10.1016\/S0304-3975(01)00356-5","article-title":"Special issue on Rewriting Logic and its Applications","volume":"285","author":"mart\u00ed-oliet","year":"2002","journal-title":"Theoretical Computer Science"},{"journal-title":"Design and Verification of Speculative Processors Tech Report 400A Laboratory for Computer Science","year":"1998","author":"shen","key":"ref16"},{"journal-title":"Modeling and Verification of ISA Implementations Tech Report 400B Laboratory for Computer Science","year":"1998","author":"shen","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/305138.305187"},{"key":"ref19","first-page":"43","article-title":"Proofs of Correctness of Cache-Coherence Protocols","volume":"2021","author":"stoy","year":"2001","journal-title":"FME 200 Formal Methods for Increasing Software Productivity Int Symposium of Formal Methods Springer LNCS"},{"journal-title":"Computer Algorithms Introduction to Design and Analysis","year":"1999","author":"baase","key":"ref4"},{"key":"ref3","first-page":"20","article-title":"Architectural Specification, Exploration and Simulation Through Rewriting-Logic","volume":"3","author":"ayala-rinc\u00f3n","year":"2002","journal-title":"Colombian Journal of Computation"},{"key":"ref6","first-page":"155","author":"borovansk\u00fd","year":"0","journal-title":"ELAN from a rewriting logic point of view"},{"key":"ref5","doi-asserted-by":"crossref","DOI":"10.1017\/CBO9781139172752","author":"baader","year":"1998","journal-title":"Term Rewriting and All That"},{"journal-title":"Introduction to Algorithms","year":"2001","author":"cormen","key":"ref8"},{"key":"ref7","first-page":"95","article-title":"Frontiers of Combining Systems 2, Studies on Logic and Computation, 7","author":"cirstea","year":"1999","journal-title":"Combining Higher-Order and First-Order Computation Using rho-Calculus Towards a Semantics of ELAN"},{"journal-title":"Tech Report 419 Laboratory for Computer Science","article-title":"Using Term Rewriting Systems to Design and Verify Processors","year":"1999","key":"ref2"},{"journal-title":"Parallel Computation Models and Methods","year":"1997","author":"akl","key":"ref1"},{"year":"0","key":"ref9"}],"event":{"name":"16th Symposium on Integrated Circuits and Systems Design. SBCCI 2003","acronym":"SBCCI-03","location":"Sao Paulo, Brazil"},"container-title":["16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8726\/27627\/01232830.pdf?arnumber=1232830","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,4,9]],"date-time":"2018-04-09T00:57:32Z","timestamp":1523235452000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1232830\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/sbcci.2003.1232830","relation":{},"subject":[]}}