{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T04:20:43Z","timestamp":1725682843881},"reference-count":33,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,8,28]],"date-time":"2023-08-28T00:00:00Z","timestamp":1693180800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,8,28]],"date-time":"2023-08-28T00:00:00Z","timestamp":1693180800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,8,28]]},"DOI":"10.1109\/sbcci60457.2023.10261666","type":"proceedings-article","created":{"date-parts":[[2023,9,28]],"date-time":"2023-09-28T17:34:02Z","timestamp":1695922442000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["Addressing Single-Event-Multiple-Transient Faults in Asynchronous RH-Click Controllers"],"prefix":"10.1109","author":[{"given":"Felipe A.","family":"Kuentzer","sequence":"first","affiliation":[{"name":"Leibniz-Institut für Innovative Mikroelektronik (IHP),Frankfurt,Germany,15236"}]},{"given":"Christos","family":"Georgakidis","sequence":"additional","affiliation":[{"name":"University of Thessaly,Department of Electrical and Computer Engineering,Volos,Greece,38221"}]},{"given":"Christos","family":"Sotiriou","sequence":"additional","affiliation":[{"name":"University of Thessaly,Department of Electrical and Computer Engineering,Volos,Greece,38221"}]},{"given":"Milos","family":"Krstic","sequence":"additional","affiliation":[{"name":"University of Potsdam,Potsdam,Germany,14469"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2005.855823"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.1987.4337470"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2014.37"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2061131"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/DFT52944.2021.9568290"},{"key":"ref30","first-page":"1","article-title":"Radiation Hardening Legalisation Satisfying TMR Spacing Constraints with Respect to HPWL","author":"georgakidis","year":"0","journal-title":"2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2965073"},{"journal-title":"Cambridge UK","year":"2010","author":"beerel","key":"ref33"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2015.10.022"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2010.11"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2016.2634538"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2013.2259260"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.2998911"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED48828.2020.9137014"},{"key":"ref19","first-page":"1","article-title":"Assessing AFEDC Architecture's Robustness to Timing Faults","author":"kuentzer","year":"0","journal-title":"Proc 33 GI\/GMMIITG-Workshop Testmethoden und Zuverläsigkeit von Schaltungen und Systemen (TuZ 2021)"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC49171.2020.00020"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2459053"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/RADECS.2016.8093192"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TR.2015.2427372"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2013.2263834"},{"key":"ref20","first-page":"101","article-title":"Metasta-bility in Better-Than-Worst-Case Designs","author":"beer","year":"0","journal-title":"International Symposium on Asynchronous Circuits and Systems"},{"key":"ref22","first-page":"614","article-title":"MASklt: Soft error rate estimation for combinational circuits","author":"anglada","year":"0","journal-title":"2016 IEEE 34th International Conference on Computer Design (ICCD)"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ETSYM.2010.5512777"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2019.2907922"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2834425"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI49217.2020.00065"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TR.2015.2440234"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2003.816568"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2184145"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.853696"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/NSSMIC.2001.1009683"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2005.860719"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TR.2016.2645479"}],"event":{"name":"2023 36th SBC\/SBMicro\/IEEE\/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)","start":{"date-parts":[[2023,8,28]]},"location":"Rio de Janeiro, Brazil","end":{"date-parts":[[2023,9,1]]}},"container-title":["2023 36th SBC\/SBMicro\/IEEE\/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10261937\/10261649\/10261666.pdf?arnumber=10261666","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,10,16]],"date-time":"2023-10-16T17:56:17Z","timestamp":1697478977000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10261666\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,8,28]]},"references-count":33,"URL":"https:\/\/doi.org\/10.1109\/sbcci60457.2023.10261666","relation":{},"subject":[],"published":{"date-parts":[[2023,8,28]]}}}