{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,8]],"date-time":"2026-07-08T16:22:23Z","timestamp":1783527743356,"version":"3.55.0"},"reference-count":8,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,8,25]],"date-time":"2025-08-25T00:00:00Z","timestamp":1756080000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,8,25]],"date-time":"2025-08-25T00:00:00Z","timestamp":1756080000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,8,25]]},"DOI":"10.1109\/sbcci66862.2025.11218679","type":"proceedings-article","created":{"date-parts":[[2025,10,31]],"date-time":"2025-10-31T17:10:05Z","timestamp":1761930605000},"page":"1-5","source":"Crossref","is-referenced-by-count":2,"title":["Analysis of Representative Critical Path as Delay Line for Bundled-Data Circuits"],"prefix":"10.1109","author":[{"given":"J\u00e9ssica Gonsalves","family":"Santos","sequence":"first","affiliation":[{"name":"Univ. Grenoble Alpes, CNRS, Grenoble INP, Univ. Grenoble Alpes,CNRS, Grenoble INP, TIMA,Grenoble,France,F-38000"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ismael de Almeida","family":"Junior","sequence":"additional","affiliation":[{"name":"Univ. Grenoble Alpes, CNRS, Grenoble INP, Univ. Grenoble Alpes,CNRS, Grenoble INP, TIMA,Grenoble,France,F-38000"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sylvain","family":"Engels","sequence":"additional","affiliation":[{"name":"Univ. Grenoble Alpes, CNRS, Grenoble INP, Univ. Grenoble Alpes,CNRS, Grenoble INP, TIMA,Grenoble,France,F-38000"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Robin","family":"Wilson","sequence":"additional","affiliation":[{"name":"Univ. Grenoble Alpes, CNRS, Grenoble INP, Univ. Grenoble Alpes,CNRS, Grenoble INP, TIMA,Grenoble,France,F-38000"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Laurent","family":"Fesquet","sequence":"additional","affiliation":[{"name":"Univ. Grenoble Alpes, CNRS, Grenoble INP, Univ. Grenoble Alpes,CNRS, Grenoble INP, TIMA,Grenoble,France,F-38000"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-3385-3"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/63526.63532"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2018.00036"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2036764"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3347469"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2017.10"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2177004"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2016.16"}],"event":{"name":"2025 38th SBC\/SBMicro\/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)","location":"Manaus, Brazil","start":{"date-parts":[[2025,8,25]]},"end":{"date-parts":[[2025,9,1]]}},"container-title":["2025 38th SBC\/SBMicro\/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11218269\/11218272\/11218679.pdf?arnumber=11218679","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,1]],"date-time":"2025-11-01T06:36:11Z","timestamp":1761978971000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11218679\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,8,25]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/sbcci66862.2025.11218679","relation":{},"subject":[],"published":{"date-parts":[[2025,8,25]]}}}