{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T07:43:47Z","timestamp":1729669427178,"version":"3.28.0"},"reference-count":12,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2007,10]]},"DOI":"10.1109\/sips.2007.4387583","type":"proceedings-article","created":{"date-parts":[[2007,11,21]],"date-time":"2007-11-21T16:31:17Z","timestamp":1195662677000},"page":"412-417","source":"Crossref","is-referenced-by-count":0,"title":["Hardware Efficient QR Decomposition for GDFE"],"prefix":"10.1109","author":[{"given":"Kyung-Ju","family":"Cho","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yi-Nan","family":"Xu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jin-Gyun","family":"Chung","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/GLOCOM.1998.776595"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICC.2002.996817"},{"key":"ref6","first-page":"2172","article-title":"A high-speed processor for rectangular-to-polar conversion with applications in digital communication","volume":"4","author":"fu","year":"1999","journal-title":"Proc IEEE Globecom"},{"key":"ref10","doi-asserted-by":"crossref","first-page":"522","DOI":"10.1109\/TVLSI.2004.825853","article-title":"Design of low error fixed-width modified Booth multiplier","volume":"12","author":"cho","year":"2004","journal-title":"IEEE Trans VLSI Systems"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/12.644295"},{"journal-title":"Matrix Computations","year":"1996","author":"golub","key":"ref11"},{"journal-title":"Computer Arithmetic Algorithms","year":"0","author":"koren","key":"ref12"},{"key":"ref8","first-page":"177","article-title":"A high-speed processor for digital sine\/cosine generation and angle rotation","volume":"1","author":"fu","year":"1998","journal-title":"Proc 32nd Asilomar Conf Signals Systems and Computers"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"1771","DOI":"10.1109\/JSSC.2003.817588","article-title":"A 400-MHz processor for the conversion of rectangular to polar coordinates in 0.25-µm CMOS","volume":"38","author":"hang","year":"2003","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSAC.2002.1007389"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-6281-8_4"},{"key":"ref9","doi-asserted-by":"crossref","first-page":"984","DOI":"10.1109\/TCSII.2003.820231","article-title":"Low error fixed-width CSD multiplier with efficient sign extension","volume":"50","author":"kim","year":"2003","journal-title":"IEEE Trans Circuit Syst II Analog Digit Signal Process"}],"event":{"name":"2007 IEEE Workshop on Signal Processing Systems","start":{"date-parts":[[2007,10,17]]},"location":"Shanghai, China","end":{"date-parts":[[2007,10,19]]}},"container-title":["2007 IEEE Workshop on Signal Processing Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4387497\/4387498\/04387583.pdf?arnumber=4387583","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T01:05:19Z","timestamp":1497747919000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4387583\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2007,10]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/sips.2007.4387583","relation":{},"ISSN":["1520-6130"],"issn-type":[{"type":"print","value":"1520-6130"}],"subject":[],"published":{"date-parts":[[2007,10]]}}}