{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T14:01:54Z","timestamp":1730296914697,"version":"3.28.0"},"reference-count":29,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T00:00:00Z","timestamp":1559347200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T00:00:00Z","timestamp":1559347200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,6,1]],"date-time":"2019-06-01T00:00:00Z","timestamp":1559347200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,6]]},"DOI":"10.1109\/slip.2019.8771332","type":"proceedings-article","created":{"date-parts":[[2019,7,25]],"date-time":"2019-07-25T23:42:27Z","timestamp":1564098147000},"page":"1-5","source":"Crossref","is-referenced-by-count":10,"title":["Bus-Invert Coding as a Low-Power Countermeasure Against Correlation Power Analysis Attack"],"prefix":"10.1109","author":[{"given":"M. Ali","family":"Vosoughi","sequence":"first","affiliation":[]},{"given":"Longfei","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Selcuk","family":"Kose","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744866"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.109"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2034081"},{"key":"ref13","first-page":"292","article-title":"An Efficient Masking Scheme for AES Software Implementations","author":"oswald","year":"2005","journal-title":"International Workshop on Information Security and Application"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICSCS.2009.5412604"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870913"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3075564.3091965"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2180094"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2016.2555810"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2702098"},{"key":"ref28","first-page":"56","article-title":"FPGA Implementations of the AES Masked Against Power Analysis Attacks","volume":"2011","author":"regazzoni","year":"2011","journal-title":"Proc COSADE"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"370","DOI":"10.1109\/JPROC.2005.862424","article-title":"The Sorcerer&#x2019;s Apprentice Guide to Fault Attacks","volume":"94","author":"bar-el","year":"2006","journal-title":"Proceedings of the IEEE"},{"key":"ref27","first-page":"172","article-title":"An Optimized S-Box Circuit Architecture for Low Power AES Design","author":"morioka","year":"2002","journal-title":"International Workshop on Cryptographic Hardware and Embedded Systems"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2018.00020"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1049\/el.2018.8024"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1007\/s12095-017-0241-x"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1002\/sec.1375"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/LCA.2018.2860006"},{"key":"ref7","article-title":"POWERT Channels: A Novel Class of Covert Communication Exploiting Power Management Vulnerabilities","author":"khatamifard","year":"2019","journal-title":"IEEE International Symposium on High-Performance Computer Architecture"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2019.8702665"},{"key":"ref9","first-page":"15","article-title":"Exploring On-Chip Power Delivery Network Induced Analog Covert Channels","volume":"4","author":"wang","year":"2019","journal-title":"IEEE TC on Cyber-Physical Systems Newsletter"},{"journal-title":"How Secure Is AES Against Brute Force Attacks","year":"2012","author":"arora","key":"ref1"},{"key":"ref20","first-page":"260","article-title":"Fault Attacks on RSA with CRT: Concrete Results and Practical Countermeasures","author":"aum\u00fcller","year":"2002","journal-title":"International Workshop on Cryptographic Hardware and Embedded Systems"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2015.2433175"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2015.2505261"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1007\/s12095-017-0271-4"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3299874.3317978"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/WICOM.2007.555"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/92.365453"}],"event":{"name":"2019 ACM\/IEEE International Workshop on System Level Interconnect Prediction (SLIP)","start":{"date-parts":[[2019,6,1]]},"location":"Las Vegas, NV, USA","end":{"date-parts":[[2019,6,2]]}},"container-title":["2019 ACM\/IEEE International Workshop on System Level Interconnect Prediction (SLIP)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8766240\/8771325\/08771332.pdf?arnumber=8771332","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,19]],"date-time":"2022-07-19T20:18:53Z","timestamp":1658261933000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8771332\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,6]]},"references-count":29,"URL":"https:\/\/doi.org\/10.1109\/slip.2019.8771332","relation":{},"subject":[],"published":{"date-parts":[[2019,6]]}}}