{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T20:34:29Z","timestamp":1725741269469},"reference-count":14,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,7,1]],"date-time":"2019-07-01T00:00:00Z","timestamp":1561939200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,7]]},"DOI":"10.1109\/smacd.2019.8795297","type":"proceedings-article","created":{"date-parts":[[2019,8,15]],"date-time":"2019-08-15T23:22:56Z","timestamp":1565911376000},"page":"25-28","source":"Crossref","is-referenced-by-count":8,"title":["On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects"],"prefix":"10.1109","author":[{"given":"Ricardo","family":"Martins","sequence":"first","affiliation":[]},{"given":"Nuno","family":"Loureneo","sequence":"additional","affiliation":[]},{"given":"Ricardo","family":"Povoa","sequence":"additional","affiliation":[]},{"given":"Nuno","family":"Horta","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2006.320869"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2002.1175792"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2016.05.008"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2913083"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2834394"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2883710"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2501293"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2102374"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD.2018.8434886"},{"year":"2017","key":"ref8"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2018.8351431"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2010.5617407"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-34060-9"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2006.884070"}],"event":{"name":"2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","start":{"date-parts":[[2019,7,15]]},"location":"Lausanne, Switzerland","end":{"date-parts":[[2019,7,18]]}},"container-title":["2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8786808\/8795217\/08795297.pdf?arnumber=8795297","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,15]],"date-time":"2022-07-15T03:18:00Z","timestamp":1657855080000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8795297\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,7]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/smacd.2019.8795297","relation":{},"subject":[],"published":{"date-parts":[[2019,7]]}}}