{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,19]],"date-time":"2025-11-19T07:13:07Z","timestamp":1763536387178,"version":"3.41.2"},"reference-count":28,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,7,7]],"date-time":"2025-07-07T00:00:00Z","timestamp":1751846400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,7,7]],"date-time":"2025-07-07T00:00:00Z","timestamp":1751846400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,7,7]]},"DOI":"10.1109\/smacd65553.2025.11092032","type":"proceedings-article","created":{"date-parts":[[2025,7,29]],"date-time":"2025-07-29T18:20:27Z","timestamp":1753813227000},"page":"1-4","source":"Crossref","is-referenced-by-count":1,"title":["An Efficient Framework for Fully Automated Post-layout Simulation-based Optimization"],"prefix":"10.1109","author":[{"given":"Veeti","family":"Lahtinen","sequence":"first","affiliation":[{"name":"Aalto University,Department of Electronics and Nanoengineering,Espoo,Finland"}]},{"given":"Altti","family":"Heikkinen","sequence":"additional","affiliation":[{"name":"Aalto University,Department of Electronics and Nanoengineering,Espoo,Finland"}]},{"given":"Santeri","family":"Porrasmaa","sequence":"additional","affiliation":[{"name":"Aalto University,Department of Electronics and Nanoengineering,Espoo,Finland"}]},{"given":"Aleksi","family":"Tamminen","sequence":"additional","affiliation":[{"name":"Aalto University,Department of Electronics and Nanoengineering,Espoo,Finland"}]},{"given":"Marko","family":"Kosunen","sequence":"additional","affiliation":[{"name":"Aalto University,Department of Electronics and Nanoengineering,Espoo,Finland"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/5.899053"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-34060-9"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ASP-DAC58780.2024.10473859"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2016.7428080"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ACCESS.2023.3265481"},{"key":"ref6","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-319-02189-8_2","volume-title":"State-of-the-Art on Automatic Analog IC Sizing","author":"Rocha","year":"2014"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.535416"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2005.1464833"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2017.2768826"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2020.11.006"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3065332"},{"key":"ref12","first-page":"307","volume-title":"Machine Learning for Analog Circuit Sizing","author":"Budak","year":"2022"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2022.3216799"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2006.883849"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/VDAT.2009.5158109"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.Design.2009.14"},{"issue":"9","key":"ref17","first-page":"732","article-title":"Analog circuit sizing via swarm intelligence","volume-title":"AEU - International Journal of Electronics and Communications","volume":"66","author":"Vural","year":"2012"},{"key":"ref18","first-page":"1417","article-title":"Efficient multiple starting point optimization for automated analog circuit optimization via recycling simulation data","volume-title":"2016 Design, Automation & Test in Europe Conference & Exhibition (DATE)","author":"Peng"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/LSSC.2022.3228911"},{"key":"ref20","first-page":"1","article-title":"An Essay on the Next Generation of Performance-driven Analog\/RF IC EDA Tools: The Role of Simulation-based Layout Optimization","volume-title":"SMACD \/ PRIME 2021; International Conference on SMACD and 16th Conference on PRIME","author":"Martins"},{"volume-title":"The System Development Kit","year":"2025","author":"Kosunen","key":"ref21"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2018.8357061"},{"volume-title":"TheSDK spice interface","year":"2025","author":"J\u00e4rvinen","key":"ref23"},{"volume-title":"TheSDK EM-simulator interface","year":"2025","author":"Lahtinen","key":"ref24"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/NorCAS58970.2023.10305468"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ICNN.1995.488968"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/SMACD61181.2024.10745440"},{"volume-title":"Fundamentals of computational swarm intelligence","year":"2005","author":"Engelbrecht","key":"ref28"}],"event":{"name":"2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD)","start":{"date-parts":[[2025,7,7]]},"location":"Istanbul, Turkiye","end":{"date-parts":[[2025,7,10]]}},"container-title":["2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11091816\/11091606\/11092032.pdf?arnumber=11092032","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,30]],"date-time":"2025-07-30T05:27:51Z","timestamp":1753853271000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11092032\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,7,7]]},"references-count":28,"URL":"https:\/\/doi.org\/10.1109\/smacd65553.2025.11092032","relation":{},"subject":[],"published":{"date-parts":[[2025,7,7]]}}}